• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.1 no.2
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• pp.13-20
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• 2008

Reliability is absolutely necessary in most recent mission critical systems which usually utilize the Ethernet based computer networks. A typical way to increase system reliability is to equip the fault tolerant Ethernet. In this paper we try to formulate the fault tolerant dual Ethernet concept and presents a comparison of its implementation approaches. Two types of dual Ethernet configuration are analyzed; the divided and the connected. Then the characteristics of three current implementation approaches which are the hardware based, the software based, and the recently proposed hybrid approach are compared. The results show that the hardware based or the hybrid approaches can be a better solution for the real time mission critical systems. Also for the systems which require the use of Commercial-Off-The-Shelf (COTS) hardware for fault tolerant Ethernet the possible choice is the software based or the hybrid approach.

• International Journal of Aeronautical and Space Sciences
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• v.7 no.1
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• pp.73-83
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• 2006

In this paper, a redundancy management system for aircraft is studied, and fault detection and isolation algorithms of inertial sensor system are proposed. Contrary to the conventional aircraft systems, UAV system cannot allow triple or quadruple hardware redundancy due to the limitations on space and weight. In the UAV system with dual sensors, it is very difficult to identify the faulty sensor. Also, conventional fault detection and isolation (FDI) method cannot isolate multiple faults in a triple redundancy system. In this paper, two FDI techniques are proposed. First, hardware based FDI technique is proposed, which combines a parity equation approach with a wavelet based technique. Second, analytic FDI technique based on the Kalman filter is proposed, which is a model-based FDI method utilizing the threshold value and the confirmation time. To provide the reference value for detecting the fault, residuals are calculated using the extended Kalman filter. To verify the effectiveness of the proposed FDI methods, numerical simulations are performed.

• Journal of the Korea Society of Computer and Information
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• v.20 no.10
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• pp.1-5
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• 2015

Based on the dual hardware and software with distributed recovery blocks, the centralized type fault tolerant store management system(SMS) was proposed. As a result of trade off study related to mutiplex hardware system design, dual single board computer(SBC) was adapted. To verify redundancy function of the proposed structure, the prototype SMS and weapon simulator were used. The proposed SMS operated normally without being affected by a primary SBC failure. The switching time from primary SBC to shadow SBC was within 200 ms. The reliability of the proposed SMS was predicted and compared with the non fault tolerant SMS, thereby it was proved that the proposed SMS has a higher reliability than the non fault tolerant system within effective range.

• Journal of the Korea Institute of Military Science and Technology
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• v.10 no.2
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• pp.61-68
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• 2007

In a naval combat system, the information processing node is a key functional equipment and performs major combat management functions including control sensor and weapon systems. Therefore, a failure of one of the node causes fatal impacts on overall combat system capability. There were many methodologies to enhance system availability by reducing the impact of system failure like a fault tolerant method. This paper proposes a fault tolerant mechanism for information processing node using a replication algorithm with hardware duplication. The mechanism is designed as a generic algorithm and does not require any special hardware. Therefore all applications in combat system can use this functionality. The asynchronous characteristic of this mechanism provides the capability to adapt this algorithm to the module which has low performance hardware.

• Journal of Korean Society for Quality Management
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• v.21 no.1
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• pp.78-95
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• 1993

The art of designing and analyzing fault-tolerant computers is surveyed with special emphasis on problems of analyzing the behavior of computers that have autonomous repair capability. The survey covers the following topics : (1) general issues in computer reliability, (2) fault-tolerance state relations and requirements, (3) computational hierarchy, (4) fault characteristics, (5) fault diagnosis, (6) fault-tolerance schemes for logic network and machines, (7) fault-coverage effects, and (8) fault-tree analysis of coverage. This paper does not include techniques for verifying nonredundant hardware or system software designs or for verifying the correctness of application programs.

• Journal of Advanced Navigation Technology
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• v.19 no.1
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• pp.48-52
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• 2015

In this paper, we propose a differential fault analysis on SSB having same structure in encryption and decryption proposed in 2011. The target algorithm was designed using advanced encryption standard and has advantage about hardware implementations. The differential fault analysis is one of side channel attacks, combination of the fault injection attacks with the differential cryptanalysis. Because SSB is suitable for hardware, it must be secure for the differential fault analysis. However, using proposed differential fault attack in this paper, we can recover the 128 bit secret key of SSB through only one random byte fault injection and an exhausted search of $2^8$. This is the first cryptanalytic result on SSB having same structure in encryption and decryption.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.506-508
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• 2007

In this paper, the induction motor bearing fault diagnosis system using current signals which are measured by over-sampling method is presented. In the case of inverter fed motor drive unlike line-driven motor drive, that make a lot of noise which can cause a wrong fault signals because of PWM(pulse width modulation) voltage. So, the current signals for fault diagnosis need very precise and high resolution information, which means this system demand additional hardware such as low pass filter, high resolution ADC system and so on to use fault diagnosis system. Therefore, the proposed over-sampling method is expected to contribute to low cost fault diagnosis system even though previous inverter fed motor drive without any additional hardware. In order to confirm the presented algorithms, various experiments for bearing faults are tested and the line current spectrum of each faulty situation using park transformation is compared with a FFT results.

• Journal of KIISE:Software and Applications
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• v.30 no.12
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• pp.1149-1157
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• 2003

As an Embedded system combining hardware and software gets more complicated, the importance of the embedded software test increases. Especially, it is mandatory to test the embedded software in the system which has high safety level. In embedded system, it is necessary to develop a test technique to detect faults in interaction between hardware and software. In this paper, we propose a test data selection technique using a fault injection technique for the faults in interaction between hardware and software in embedded system and we apply our technique to the Digital Plant Protection System and analyze effectiveness of the proposed technique through experiments.

• Journal of Power Electronics
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• v.9 no.2
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• pp.224-231
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• 2009

The induction motor rotor fault diagnosis system using current signals, which are measured using an axis-transformation method, is presented in this paper. In inverter-fed motor drives, unlike line-driven motor drives, the stator currents are rich in harmonics; therefore fault diagnosis using stator current is not trivial. The current signals for rotor fault diagnosis need precise and high resolution information, which means the diagnosis system demands additional hardware such as a low pass filter, high resolution ADC, and encoder, etc. The proposed axis-transformation method with encoder and without encoder is expected to contribute to a low cost fault diagnosis system in inverter-fed motor drives without the need for any additional hardware. In order to confirm the validity of the developed algorithms, various experiments for rotor faults are tested and the line current spectrum of each faulty situation using Park transformation is compared with the results obtained from fast Fourier transforms.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.11a
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• pp.342.2-342
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• 2002

Fault tolerant control algorithm fer heteropolar magnetic bearings are presented. This fault tolerant control utilizes grouping of currents as C-cores in order to isolate magnetic fluxes. Hardware requirements to maintain fault tolerant control are reduced since decoupling chokes are not required in this control scheme. The currents supplied to each pole are redistributed, if some coils (ail suddenly, such that the resultant magnetic forces should remain invariant through coil failure events. (omitted)