• Journal of Broadcast Engineering
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• v.13 no.5
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• pp.732-743
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• 2008

In H.264/AVC, 4$\times$4 block transform is used for intra and inter prediction instead of 8$\times$8 block transform. Using small block size coding, H.264/AVC obtains high temporal prediction efficiency, however, it has limitation in utilizing spatial redundancy. Motivated on these points, we propose a multi-dimensional transform which achieves both the accuracy of temporal prediction as well as effective use of spatial redundancy. From preliminary experiments, the proposed multi-dimensional transform achieves higher energy compaction than 2-D DCT used in H.264. We designed an integer-based transform and quantization coder for multi-dimensional coder. Moreover, several additional methods for multi-dimensional coder are proposed, which are cube forming, scan order, mode decision and updating parameters. The Context-based Adaptive Variable-Length Coding (CAVLC) used in H.264 was employed for the entropy coder. Simulation results show that the performance of the multi-dimensional codec appears similar to that of H.264 in lower bit rates although the rate-distortion curves of the multi-dimensional DCT measured by entropy and the number of non-zero coefficients show remarkably higher performance than those of H.264/AVC. This implies that more efficient entropy coder optimized to the statistics of multi-dimensional DCT coefficients and rate-distortion operation are needed to take full advantage of the multi-dimensional DCT. There remains many issues and future works about multi-dimensional coder to improve coding efficiency over H.264/AVC.

• Journal of Broadcast Engineering
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• v.19 no.6
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• pp.836-846
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• 2014

To expedite UHD (Ultra High Definition) video service, the HEVC (High-Efficiency Video Coding) technology has recently been standardized and it achieves two times higher compression efficiency than the conventional H.264/AVC. To obtain the improved efficiency, however, it employs many complex methods which need complicated calculation, thereby resulting in a significantly increased computational complexity when compared to that of H.264/AVC. For example, to improve the coding efficiency of intra frame coding, up to 35 intra prediction modes are defined in HEVC, but this results in an increased encoding time than the H.264/AVC. In this paper, we propose a fast intra prediction mode decision scheme which reduces computational complexity by changing the number of intra prediction mode in accordance with the percentage of PU sizes for a given video resolution, and by classifying the 35 intra prediction modes into 4 categories considering video resolution and quantization parameter. The experimental results show that the total encoding time is reduced by about 7% on average at the cost of only 2% increase in BD-rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.4C
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• pp.349-354
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• 2009

In this paper, a new motion compensation scheme to reduce external memory access frequency which is one of the major bottlenecks for real-time decoding is proposed. Most H.264/AVC decoders store reference pictures in external memories due to the large size and reference blocks are read into the decoder core as needed during decoding. If the reference data access is done for each reference block in decoding sequence, the memory bandwidth can be unacceptable for real-time decoding. This paper presents a memory access scheme for motion compensation to read as many reference data as possible with reduced memory access frequency by analyzing reference data access pattern for each macroblock. Experimental results show that the proposed motion compensation scheme leads to approximately 30% improvement in memory bandwidth requirement.

• Journal of the Korea Society of Computer and Information
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• v.16 no.7
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• pp.59-65
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• 2011

Korea DMB Service is popularized, and is used by many users. But latest display devices compared to the DMB content resolution support higher resolution and a variety of video resampling technologies has been used. Generally, subjective video quality is determined by object recognition rate in video, and increased as the edge space between objects are more clear. An edge is the boundary between an object and the background, and indicates the boundary between overlapping objects. the predicted direction in intra prediction used in H.264/AVC has the similarity up to 80% for the edge information. In the study, we propose an effective up-sampling mothed using the edge information that is extracted for the relationship between the intra prediction data and the DCT coefficient data of H.264 video encoding.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.1C
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• pp.37-47
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• 2009

When H.264 encoded video streams are transmitted over wireless network, packet loss is unavoidable. Responding on this environment, we propose methods to recover missed motion vector in the decoder: At first, A candidate vector set for missing macroblock is estimated from high correlation coefficient of neighboring motion vectors and missing block vectors the algorithm clusters candidate vectors through distances amongst motion vectors of neighboring blocks. Then the optimal candidate vector is determined by the median value of the clustered motion vector set. In next stage, from the candidate vector set, the final candidate vector of missing block is determined it has minimum distortion value considering directions of neighboring pixels' boundary. Test results showed that the proposed algorithm decreases the candidate motion vectors $23{\sim}61%$ and reduces $3{\sim}4sec$ on average processing(decoding) time comparing the existing H.264 codec. The PSNR, in terms of visual quality is similar to existing methods.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.53-60
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• 2009

Motion estimation for H.264/AVC video CODEC is very complex and requires a huge amount of computational efforts because it uses multiple reference frames and variable block sizes. We propose the architecture of high-performance integer-pixel motion estimation circuit based on fast algorithms for multiple reference frame selection, block matching, block mode decision and motion vector estimation. We also propose the architecture of high-performance interpolation circuit for sub-pixel motion estimation. We described the RTL circuit in Verilog HDL and synthesized the gate-level circuit using 130nm standard cell library. The integer-pixel motion estimation circuit consists of 77,600 logic gates and four $32\times8\times32$-bit dual-port SRAM's. It has tile maximum operating frequency of 161MHz and can process up to 51 D1 (720$\times$480) color in go frames per second. The fractional motion estimation circuit consists of 22,478 logic gates. It has the maximum operating frequency of 200MHz and can process up to 69 1080HD (1,920$\times$1,088) color image frames per second.

• The KIPS Transactions:PartB
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• v.12B no.6 s.102
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• pp.637-646
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• 2005

Most of the multimedia contents for DBM services art provided as MPEG-2 bit streams. However, they have to be transcoded to H.264 bit streams for practical services because the standard video codec for DMB is H.264. The existing transcoder architecture is Cascaded Pixel-Domain Transcoding Architecture, which consists of the MPEG-2 dacoding phase and the H.264 encoding phase. This architecture can be easily implemented using MPEG-2 decoder and H.264 encoder without source modifying. However. It has disadvantages in transcoding time and DCT-mismatch problem. In this paper, we propose two kinds of transcoder architecture, DCT-OPEN and DCT-CLOSED, to complement the CPDT architecture. Although DCT-OPEN has lower PSNR than CPDT due to drift problem, it is efficient for real-time transcoding. On the contrary, the DCT-CLOSED architecture has the advantage of PSNR over CPDT at the cost of transcoding time.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.207-210
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• 2009

An efficient algorithm to compress high dynamic range (HDR) videos is proposed in this work. We separate an HDR video sequence into a tone-mapped low dynamic range (LDR) sequence and a ratio sequence. Then, we encode those two sequences using the standard H.264/AVC codec. During the encoding, we allocate a limited amount of bit budget to the LDR sequence and the ratio sequence adaptively to maximize the qualities of both the LDR and HDR sequences. While a conventional LDR decoder uses only the LDR stream, an HDR decoder can reconstruct the HDR video using the LDR stream and the ratio stream. Simulation results demonstrate that the proposed algorithm provides higher performance than the conventional methods.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2012.07a
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• pp.228-230
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• 2012

ITU와 ISO/IEC가 공동으로 UHD(Ultra High Definition)급 영상 부호화를 위해 표준화를 진행하고 있는 HEVC(High Efficient Video Codec)는 H.264/AVC 대비 2배 이상의 압축 효율을 갖는 것을 목표로 정하고 있다. HEVC는 다수의 개선된 기술을 사용하고 있기 때문에 부호화효율을 크게 향상시켰는데 여기에 비트 할당 및 비트율 제어 기술사용을 비디오 코덱의 성능을 향상 시킬 수 있는 중요한 요소들이다. 기존 H.264/AVC의 비트율 제어 기술에는 HEVC의 특성을 고려하지 못한 비트율-양자화 모델을 사용하여 HEVC의 성능을 최적화하기에 어려움이 있었다. 따라서 본 논문에서는 HEVC에서 효율적으로 비트 할당 및 비트율 제어를 할 수 있도록, 기존보다 향상된 비트율-양자화 모델을 제안한다. 그리고 실험을 통하여 제안하는 비트율-양자화 모델이 기존 기술에 비해 정확함을 보인다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2016.11a
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• pp.98-99
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• 2016

최근 초고화질 해상도(UHD) 영상 서비스에 따른 기존의 비디오 압축 기술인 H.264/AVC 대비 두 배 이상의 압축 성능을 가지는 HEVC(High-Efficiency Video Codec)의 표준화가 완료되었다. 그러나 높은 압축 효과를 얻기 위하여 복잡한 연산이 필요한 기법들이 많이 도입되어 HEVC의 부호화 복잡도는 H.264/AVC보다 크게 증가되었다. 이에 본 논문은 HEVC의 복잡도를 줄이기 위한 정보로 입력 영상에 장면 전환 프레임을 전처리 과정을 통하여 검출하였다. 검출된 정보는 참조 픽쳐 리스트를 구성하는데 사용하여 HEVC 부호화기의 계산 복잡도의 큰 비중을 차지하는 ME(Motion Estimation)와 MC(Motion Compensation)의 횟수를 줄이도록 설계하였다.