• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.10C
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• pp.778-786
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• 2008

The H.264/AVC video coding standard shows superior coding efficiency by adopting many new techniques. However, the encoding complexity increases greatly to achieve higher coding efficiency. Especially, the rate distortion optimization technique, which is used to decide the intra-prediction mode, increases the encoding complexity. In this paper, we propose an efficient intra-prediction mode decision method. By using the variance of pixel values and the edge direction, the computational complexity of the intra-prediction mode decision is greatly reduced.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.4
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• pp.227-233
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• 2006

In order to reduce blocking artifacts and improve compression efficiency, H.264/AVC standard employs an adaptive in-loop deblocking filter. This paper proposes a new hardware architecture of the deblocking filter that employs a four-stage pipelined structure with an efficient data distribution. The proposed architecture allows a simultaneous supply of eight data samples to fully utilize the pipelined filter in both horizontal and vertical filterings. This paper also presents a new filtering order and data reuse scheme between consecutive macroblock filterings to reduce the communication for external memory access. The number of required cycles for filtering one macroblock (MB) is 357 cycles when the proposed filter uses dual port SRAMs. This execution speed is only 41.3% of that of the fastest previous work.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2C
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• pp.148-155
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• 2006

For the improvement of coding efficiency, the H.264 standard uses new coding tools which are not used in previous coding standards. Among new coding tools, motion estimation using smaller block sizes leads to higher correlation between the motion vectors of neighboring blocks. This characteristic of H.264 is useful for the motion vector recovery. In this paper, we propose the motion vector recovery method based on optical flow. Since the proposed method estimates the optical flow velocity vector from more accurate initial value and optical flow region is limited to 16$\times$16 block size, we can alleviate the complexity of computation of optical flow velocity. Simulation results show that our proposed method gives higher objective and subjective video quality than previous methods.

• Journal of Broadcast Engineering
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• v.15 no.2
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• pp.205-216
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• 2010

In this paper, a method of MPEG-2 Transport Stream (TS) multiplexing for Ultra HDTV (UHDTV) and its design and implementation as a SW tool is described. In practice, UHD video may be divided into several HD videos and each video is encoded in parallel. Therefore, it is necessary to synchronize and multiplex multiple bitstreams encoding each HD video for transmitting and storing UHD video. In this paper, it is assumed that 4 HD videos partitioning a UHD spatially are encoded as H.264/AVC and two 5.0 channel audios are encoded by AC-3. Therefore, 4 H.264/AVC elementary streams (ESs) and 2 AC-3 ESs is mainly considered in the TS multiplexing of UHD. For the carriage of H.264/AVC and AC-3 over MPEG-2 TS, PES packetization and TS multiplexing are designed and implemented based on the extended specification of the MPEG-2 Systems and ATSC (Digital audio compressed standard), respectively. The implemented UHD TS multiplexing tool emulates real time HW operation in the time unit corresponding to the duration of one TS packet transmission in a given TS rate. In particular, in order to satisfy the timing model, the buffers defined in the TS System Target Decoder (T-STD) are monitored and their statuses are considered in the scheduling of TS multiplexing. For UHD multiplexing, two kinds of multiplexing structures, which are UHD re-multiplexing and UHD program multiplexing, are implemented and their strength and weakness are investigated. The developed UHD TS multiplexing tool is tested and verified in terms of the syntax and semantics conformance and functionalities by using a commercial analyzer and real-time presentation tools.

• Journal of Broadcast Engineering
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• v.18 no.2
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• pp.249-260
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• 2013

Recently, High-Efficiency Video Coding (HEVC) has been developed as a new video coding standard mainly focusing on the coding of ultra high definition (UHD) videos as the high resolution and high quality videos are getting more popular. Furthermore, the scalable extension of HEVC is being standardized for more efficient provision of HD and UHD services in the communications-broadcasting convergence environment. In this paper, we propose an improved scalable video coding method of H.264/AVC to achieve high coding efficiency particularly for UHD and HD videos. The basic idea is to allow large block size in H.264/AVC SVC, which results in more efficient inter-layer prediction and syntax elements coding. The experimental results show that it achieves an average 4.53% reduction in BD-rate relative to H.264/AVC SVC.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.4
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• pp.280-283
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• 2009

To improve coding performance of scalable video coding which is an emerging video coding standard as an extension of H.264/AVC, SVC uses not only intra prediction and inter prediction but inter-layer prediction. This causes a problem that computational complexity is increased. In this paper, we propose an efficient intra prediction mode decision method in spatial enhancement layer to reduce the computational complexity. The proposed method selects Inra_BL mode using RD cost of Intra_BL in advance. After that, intra mode is decided by only comparing DC modes. Experimental results show that the proposed method reduces 59% of the computation complexity of intra prediction coding, while the degradation in video quality is negligible.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.12
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• pp.2725-2730
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• 2012

In this paper, for improving the H.264/AVC hardware performance, we propose an inter predictor hardware design using a multi reference frame selector and an implicit weighted predictor. previous reference frame are reused for Low Memory Bandwidth. The size of the reference memory in the predictor was reduced by about 46% and the external memory access rate was reduced by about 24% compared with the one in the reference software JM16.0. We designed the proposed system with Verilog-HDL and synthesized inter predictor circuit using the Magnachip 0.18um CMOS standard cell library. The synthesis result shows that the gate count is about 2,061k and the design can run at 91MHz.

• ETRI Journal
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• v.29 no.6
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• pp.736-744
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• 2007

We propose a fast macroblock (MB) mode prediction and decision algorithm based on temporal correlation for P-slices in the H.264/AVC video standard. There are eight block types for temporal decorrelation, including SKIP mode based on rate-distortion (RD) optimization. This scheme gives rise to exhaustive computations (search) in the coding procedure. To overcome this problem, a thresholding method for fast inter mode decision using a MB tracking scheme to find the most correlated block and RD cost of the correlated block is suggested for early stop of the inter mode determination. We propose a two-step inter mode candidate selection method using statistical analysis. In the first step, a mode is selected based on the mode information of the co-located MB from the previous frame. Then, an adaptive thresholding scheme is applied using the RD cost of the most correlated MB. Secondly, additional candidate modes are considered to determine the best mode of the initial candidate modes that does not satisfy the designed thresholding rule. Comparative analysis shows that a speed-up factor of up to 70.59% is obtained when compared with the full mode search method with a negligible bit increment and a minimal loss of image quality.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.430-442
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• 2013

This paper presents a fast multi-reference frame integer motion estimator for H.264/AVC. The proposed system uses the previously proposed fast multi-reference frame algorithm. The previously proposed algorithm executes a full search area motion estimation in reference frames 0 and 1. After that, the search areas of motion estimation in reference frames 2, 3 and 4 are minimized by a linear relationship between the motion vector and the distances from the current frame to the reference frames. For hardware implementation, the modified algorithm optimizes the search area, reduces the overlapping search area and modifies a division equation. Because the search area is reduced, the amount of computation is reduced by 58.7%. In experimental results, the modified algorithm shows an increase of bit-rate in 0.36% when compared with the five reference frame standard. The pipeline structure and the memory controller are also adopted for real-time video encoding. The proposed system is implemented using 0.13 um CMOS technology, and the gate count is 1089K with 6.50 KB of internal SRAM. It can encode a Full HD video ($1920{\times}1080P@30Hz$) in real-time at a 135 MHz clock speed with 5 reference frames.

• Journal of the Semiconductor & Display Technology
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• v.13 no.1
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• pp.109-112
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• 2014

H.264/AVC is an international video coding standard that is established in cooperation with ITU-T VCEG and ISO/IEC MPEG, which shows improved code and efficiency than the previous video standards. Motion estimation using various macroblock from 44 to 1616 among the compression techniques of H.264/AVC contributes much to high compression efficiency. Generally, in the case of small motion vector or low complexity about P slice is decided $P16{\times}16$ mode encoding method. But according to circumstances, macroblock is decided $P16{\times}16$ mode despite large motion vector. If the motion vector variance is more than threshold and final select mode is $P16{\times}16$ mode, it is switched to $P8{\times}8$ mode, so this paper shows that the storage capacity is reduced. The results of experiment show that the proposed algorithm increases the compression efficiency of the H.264/AVC algorithm to 0.4%, even reducing the time and without increasing complexity.