• Title/Summary/Keyword: H.264/AVC standard

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Implementation and Analysis of Performance Estimation Model of H.264/AVC Baseline Profile Decoder (H.264/AVC Baseline Profile Decoder의 성능 예측 모델의 구현과 분석)

  • Moon, Kyoung-Hwan;Song, Yong-Ho
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.44 no.3
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    • pp.108-123
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    • 2007
  • As H.264/AVC standard has proven to be a key technology of multimedia application, many researches to improve H.264/AVC standard are actively conducted. Those researches are conducted in various ways such as algorithm analysis and improvement or structure enhancement for reducing bottlenecks of performance. Even though targets and directions of those studies are not the same, performance of H.264/AVC standard is commonly analyzed in the early phase. In analysis phase, potential problems with H.264/AVC standard are identified and the most critical problem which has serious effects on performance is determined. Therefore, analysis phase is one of the important steps to decide overall directions and targets of the research. This research proposes a mathematical model which can be used in the early performance analysis phase to estimate performance in conducting research of improving the performance of H.264/AVC Baseline Profile decoder. The proposed model is designed by considering many variables of H.264/AVC decoder operation so that it is easy to predict its performance according to changes in each element.

An Implementation of a PCI Interface for H.264/AVC Encoder (H.264/AVC 인코더 용 PCI 인터페이스의 구현)

  • Park, Kyoung-Oh;Kim, Tae-Hyun;Hwang, Seung-Hoon;Hong, You-Pyo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.9A
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    • pp.868-873
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    • 2010
  • H.264/AVC video compression standard has been adopted for DMB, digital TV and various next generation broadcasting, communication and consumer electronics applications, and modern DVR system is also based on H.264/AVC standard. Although PC-based DVRs use PCI bus for main interface typically, H.264/AVC codec for SOCs use AHB bus for host interface. In this paper, we present an implementation of PCI to AHB interface module for H.264/AVC codec to efficiently communicate with a PC and experimental results.

Area-efficient Design of Intra Frame Decoder for H.264/AVC (H.264/AVC용 면적 효율적인 인트라 프레임 디코더 설계)

  • Jung, Duck-Young;Sonh, Seung-Il
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.11
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    • pp.2020-2025
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    • 2006
  • H.264/AVC is newest video coding standard of the ITU-T Video coding Experts Group and the ISO/IEC Moving Picture Expets Group. Recently H.264/AVC has been adopted as a video compression standard in DMB and multimedia equipments. In this paper, we propose a H.264/AVC intra frame decoder which can minimize the memory usage and chip size. The proposed intra frame decoder is described in VHDL language and simulated in model_sim. It was verified in chip level by downloading to XCV1000E FPGA chip.

UEP Turbo Encoder for H.264/AVC (H.264/AVC를 위한 UEP Turbo Encoder)

  • Kim, June;Kim, Youngseop;Park, In-Ho
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.1
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    • pp.51-53
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    • 2015
  • H.264/AVC is international video coding standard, which shows improved code and efficiency than the existing video standards. H.264/AVC proposes data partitioning method that considerably to be an effective layering technique which separates important addressing data from the residual data. UEP(Unequal Error Protection) turbo code of H.264/AVC uses retransmission system to get the UEP effectively. However, Data partitioning system of H.264/AVC is inefficient method in turbo code of H.264/AVC. Based on this observation, we propose the new UEP turbo code algorithm that reconstructs input sequence of turbo code without retransmission system.

Implementation of IQ/IDCT in H.264/AVC Decoder Using GPGPU (GPGPU를 이용한 H.264/AVC 디코더)

  • Kim, Dong-Han;Lee, Kwang-Yeob
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.162-164
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    • 2010
  • H.264/AVC(Advanced Video Coding) is a standard for video compression. H.264/AVC provides good video quality at substantially lower bit rates than previous standards. In this papers, we propose the efficient architecture of H.264/AVC decoder using GPGPU. GPGPU can process many of operation in parallel. IQ/IDCT is possible that parallel processing in H.264/AVC decoding algorithm.

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An Efficient Hardware Architecture of Intra Prediction in H.264/AVC Decoder (H.264/AVC 디코더용 인트라 예측기의 효율적인 하드웨어 구현)

  • 김형호;유기원
    • Proceedings of the IEEK Conference
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    • 2003.11a
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    • pp.91-94
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    • 2003
  • H.264/AVC is the upcoming video coding standard of ITU-T H.264 and ISO MPEG-4 AVC. The new standard can achieve a significant improvement up to 50% in compression ratio compared to MPEG-4 advanced simple profile. In this paper, we propose the novel intra prediction scheme to speed up intra prediction process in H.264/AVC decoder and show the hardware architecture for it. The proposed scheme uses the concurrent processing of the 4$\times$4 intra prediction, which is based on that some 4$\times$4 block pairs in a 16$\times$16 luma block can be processed concurrently. The proposed scheme can reduce intra prediction time by 33 %.

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A Parallel Pipeline Execution Algorithm for H.264/AVC Intra Prediction (H.264/AVC의 인트라 예측 병렬 파이프라인 실행 알고리즘)

  • Xu, Jia-Yue;Cho, Hyo-Moon;Cho, Sang-Bock
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.45 no.5
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    • pp.79-86
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    • 2008
  • H.264/AVC is the newest international video coding standard developed by the joint ITU-T and ISO/IEC standards organizations. This newest video coding standard offers much higher coding efficiency than the H.261, H.263 and MPEG-4. But it has high computing complexity and high H/W resources wasting problem. This paper described the two unit parallel pipeline structure. This new structure comparing with standard model decreased the computing complexity of 67% and the H/W resources waste of 3%.

A Multi-Channel Trick Mode Play Algorithm and Hardware Implementation of H.264/AVC for Surveillance Applications (H.264/AVC 감시 어플리케이션용 멀티 채널 트릭 모드 재생 알고리즘 및 하드웨어 구현)

  • Jo, Hyeonsu;Hong, Youpyo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.12
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    • pp.1834-1843
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    • 2016
  • DVRs are the most common recording and displaying devices used for surveillance. Video compression plays a key role in DVRs for saving storage; the video compression standard, H.264/AVC, has recently become the dominant choice for DVRs. DVRs require various display modes, such as fast-forward, backward play, and pause; these are called trick modes. The implementation of precise trick mode play requires a very high decoding capability or a very intelligent scheme in order to handle the high computation complexity. The complexity is increased in many surveillance applications where more than one camera is used to monitor multiple spots or to monitor the same area using various angles. An implementation of a trick mode play and a frame buffer management scheme for the hardware-based H.264/AVC codec for multi-channel is presented in this paper. The experimental results show that exact trick mode play is possible using a standard H.264/AVC video codec with keyframe encoding feature at the expense of bitstream size increase.

Intra Prediction Information Skip using Analysis of Adjacent Pixels for H.264/AVC (인접 화소 성분 분석을 이용한 H.264/AVC에서의 Intra 예측 정보 생략)

  • Kim, Dae-Yeon;Kim, Dong-Kyun;Lee, Yung-Lyul
    • Journal of Broadcast Engineering
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    • v.14 no.3
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    • pp.271-279
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    • 2009
  • The Moving Picture Experts Group (MPEG) and Video Coding Experts Group (VCEG) have developed a new standard that promises to outperform the earlier MPEG-4 and H.263 standards. The new standard is called H.264/AVC (Advanced Video Coding) and is published jointly as MPEG-4 Part 10 and ITU-T Recommendation H.264. In particular, the H.264/AVC intra prediction coding provides nine directional prediction modes for every $4{\times}4$ block in order to reduce spatial redundancies. In this paper, an ABS (Adaptive Bit Skip) mode is proposed. In order to achieve coding efficiency, the proposed method can remove the mode bits to represent the prediction mode by using the similarity of adjacent pixels. Experimental results show that the proposed method achieves the PSNR gain of about 0.2 dB in R-D curve and reduces the bit rates about 3.6% compared with H.264/AVC.

Design of CAVLC Decoder for H.264/AVC (H.264/AVC용 CAVLC 디코더의 설계)

  • Jung, Duck-Young;Sonh, Seung-Il
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.6
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    • pp.1104-1114
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    • 2007
  • Digital video compression technique has played an important role that enables efficient transmission and storage of multimedia data where bandwidth and storage space are limited. The new video coding standard, H.264/AVC, developed by Joint Video Team(JVT) significantly outperforms previous standards in compression performance. Especially, variable length code(VLC) plays a crucial pun in video and image compression applications. H.264/AVC standard adopted Context-based Adaptive Variable Length Coding(CAVLC) as the entropy coding method. CAVLC of H.264/AVC requires a large number of the memory accesses. This is a serious problem for applications such as DMB and video phone service because of the considerable amount of power that is consumed in accessing the memory. In order to overcome this problem in this paper, we propose a variable length technique that implements memory-free coeff_token, level, and run_before decoding based on arithmetic operations and using only 70% of the required memory at total_zero variable length decoding.