• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.8C
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• pp.790-800
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• 2009

For the improvement of coding efficiency, the H.264/AYC standard uses new coding tools such as 1/4-pel-accurate motion estimation, multiple references, intra prediction, loop filter, variable block size etc. Using these coding tools, H.264/AYC has achieved significant improvements from rate-distortion point of view compared to existing standards. However, the encoder complexity was greatly increased due to these coding tools. We focus on the complexity reduction method of intra macroblock mode selection. The proposed algorithm for fast intra mode selection calculates the edge activity in transform domain, and performs fast encoding of intra frame in H.264/AYC through the fast prediction mode selection of intra4x4 and chrominance blocks. Simulation results show that the proposed method saves about 59.76% for QCIF sequences and 65.03% for CIF sequences of total encoding time, while bitrate increase and PSNR decrease are very small.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2006.07a
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• pp.406-406
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• 2006

• ETRI Journal
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• v.31 no.6
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• pp.784-794
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• 2009

We present a full HD (1080p) H.264/AVC High Profile hardware encoder based on fast motion estimation (ME). Most processing cycles are occupied with ME and use external memory access to fetch samples, which degrades the performance of the encoder. A novel approach to fast ME which uses shared multibank memory can solve these problems. The proposed pixel subsampling ME algorithm is suitable for fast motion vector searches for high-quality resolution images. The proposed algorithm achieves an 87.5% reduction of computational complexity compared with the full search algorithm in the JM reference software, while sustaining the video quality without any conspicuous PSNR loss. The usage amount of shared multibank memory between the coarse ME and fine ME blocks is 93.6%, which saves external memory access cycles and speeds up ME. It is feasible to perform the algorithm at a 270 MHz clock speed for 30 frame/s real-time full HD encoding. Its total gate count is 872k, and internal SRAM size is 41.8 kB.

• Journal of information and communication convergence engineering
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• v.7 no.2
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• pp.193-198
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• 2009

The H.264/ AVC video coding standard supports the intra prediction with various block sizes for luma component and a 8x8 block size for chroma components. This new feature of H.264/AVC offers a considerably higher improvement in coding efficiency compared to previous compression standards. In order to achieve this, H.264/AVC uses the Rate-distortion optimization (RDO) technique to select the best intra prediction mode for each block size, and it brings about the drastic increase of the computation complexity of H.264 encoder. In this paper, a fast block size decision algorithm is proposed to reduce the computation complexity of the intra prediction in H.264/AVC. The proposed algorithm computes the smoothness based on AC and DC coefficient energy for macroblocks and compares with the nonparametric criteria which is determined by considering information on neighbor blocks already reconstructed, so that deciding the best probable block size for the intra prediction. Also, the use of non-parametric criteria makes the performance of intra-coding not be dependent on types of video sequences. The experimental results show that the proposed algorithm is able to reduce up to 30% of the whole encoding time with a negligible loss in PSNR and bitrates and provides the stable performance regardless types of video sequences.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.5
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• pp.112-120
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• 2013

In this paper, we propose high-performance H.264/AVC CAVLC encoder for UD video real time processing. Statistical values are obtained in one cycle through the parallel arithmetic and logical operations, using non-zero bit stream which represents zero coefficient or non-zero coefficient. To encode codeword per one cycle, we remove recursive operation in level encoding through parallel comparison for coefficient and escape value. In oder to implement high-speed circuit, proposed CAVLC encoder is designed in two-stage {statical scan, codeword encoding} pipeline. Reducing the encoding table, the arithmetic unit is used to encode non-coefficient and to calculate the codeword. The proposed architecture was simulated in 0.13um standard cell library. The gate count is 33.4Kgates. The architecture can support Ultra Definition Video ($3840{\times}2160$) at 100 frames per second by running at 100MHz.

• Journal of information and communication convergence engineering
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• v.7 no.4
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• pp.501-506
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• 2009

In the H.264/ AVC video coding standard, the intra-prediction coding with various block sizes offers a considerably high improvement in coding efficiency compared to previous standards. In order to achieve this, H.264/AVC uses the Rate-distortion optimization (RDO) technique to select the best intraprediction mode for a macroblock, and it brings about the drastic increase of the computation complexity of H.264 encoder. To reduce the computation complexity and stabilize the coding performance on visual quality, this paper proposed a fast intra-prediction mode decision algorithm using non-parametric thresholds and simplified directional masks. The use of nonparametric thresholds makes the intra-coding performance not be dependent on types of video sequences and simplified directional masks reduces the compuation loads needed by the calculation of local edge information. Experiment results show that the proposed algorithm is able to reduce more than 55% of the whole encoding time with a negligible loss in PSNR and bitrates and provides the stable performance regardless types of video sequences.

• Journal of Korea Multimedia Society
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• v.10 no.8
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• pp.997-1003
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• 2007

H.264/AVC enhances inter-frame coding performance adopting new intra and inter mode prediction in inter-frame motion prediction. H.264 encoder provides performance superior to existing standards with the prediction modes. Instead of enhanced performance, however, both predictions increase complexity of encoder and demand a lot of coding time. This paper proposes a method using local statistics of resultant intra mode, my and mode map to predict inter mode. There are relationship between intra and inter mode, and we can predict inter mode using neighboring macroblocks' resultant mode and motion vector according to the contents of frame. The experimental results show that the proposed algorithm reduces encoding time by 31% on average with a negligible loss of PSNR and bitrate.

• Journal of Broadcast Engineering
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• v.15 no.4
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• pp.498-512
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• 2010

Intra coding is an indispensable coding tool since it can provide random accessibility as well as error resiliency. However, it is the problem that intra coding has relatively low coding efficiency compared with inter coding in the area of video coding. Even though H.264/AVC has significantly improved the intra coding performance compared with previous video standards, H.264/AVC encoder complexity is significantly increased, which is not suitable for low bit rate interactive services. In this paper, a Voting-based Intra Mode Bit Skip (V-IMBS) scheme is proposed to improve coding efficiency as well as to reduce encoding time complexity using decoder-side prediction. In case that the decoder can determine the same prediction mode as what is chosen by the encoder, the encoder does not send that intra prediction mode; otherwise, the conventional H.264/AVC intra coding is performed. Simulation results reveal a performance increase up to 4.44% overall rate savings and 0.24 dB in peak signal-to-noise ratio while the frame encoding speed of proposed method is about 42.8% better than that of H.264/AVC.

• Journal of Korea Multimedia Society
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• v.11 no.2
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• pp.163-174
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• 2008

The H.264/AVC provides gains in compression efficiency of up to 50% over a wide range of bit rates and video resolutions compared to previous standards. However, to achieve such high coding efficiency, the complexity of H.264/AVC encoder is also increased drastically than previous ones, mainly because of mode decision. In this paper, we propose a three-step mode decision algorithm for fast encoding in H.264/AVC. In the first step, we select skip mode or inter mode by considering the temporal correlation and spatial correlation. In the second step, if the result of the first step is INTER mode, we select one group between two groups for final mode. In the third step, we select final mode by exploiting the pixel values of error macroblock or the modes of adjacent macroblocks. Simulations show that the proposed method reduces the encoding time by 42% on average without any significant PSNR losses.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.12
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• pp.1834-1843
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• 2016

DVRs are the most common recording and displaying devices used for surveillance. Video compression plays a key role in DVRs for saving storage; the video compression standard, H.264/AVC, has recently become the dominant choice for DVRs. DVRs require various display modes, such as fast-forward, backward play, and pause; these are called trick modes. The implementation of precise trick mode play requires a very high decoding capability or a very intelligent scheme in order to handle the high computation complexity. The complexity is increased in many surveillance applications where more than one camera is used to monitor multiple spots or to monitor the same area using various angles. An implementation of a trick mode play and a frame buffer management scheme for the hardware-based H.264/AVC codec for multi-channel is presented in this paper. The experimental results show that exact trick mode play is possible using a standard H.264/AVC video codec with keyframe encoding feature at the expense of bitstream size increase.