• ETRI Journal
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• v.32 no.2
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• pp.336-338
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• 2010

A macroblock-level deblocking method is proposed for H.264/AVC, in which blocking artifacts are effectively eliminated in the discrete cosine transform domain at the macroblock encoding stage. Experimental results show that the proposed algorithm outperforms conventional H.264 in terms of coding efficiency, and the bitrate saving is up to 5.7% without reconstruction quality loss.

• Journal of Broadcast Engineering
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• v.12 no.4
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• pp.377-380
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• 2007

In this paper, an improved CABAC is proposed for the lossless compression in H.264/AVC. CABAC in the lossless coding is not as efficient as that in the lossy compression since it was developed for lossy coding. CABAC for the lossless coding in H.26과/AVC Advanced 4:4:4 Profile is applied without the change of the conventional binarization method. Thus, a binarization method considering the statistical characteristic of residual signals is proposed for the lossless coding in 0.264/AVC Advanced 4:4:4 Profile. The experimental results show that the proposed method obtains approximately 3.4% bitrate reduction in comparison to that of the conventional lossless coding.

• 전자공학회논문지 IE
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• v.47 no.2
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• pp.21-26
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• 2010

This paper proposed an efficient algorithm to reduce the amount of calculation for Scalability Extension which takes a great deal of the operational time in H.264/AVC. This algorithm decides a search range according to the direction of predicted motion vector, and then performs an adaptive spiral search for the candidates with JM(Joint Model) FME(Fast Motion Estimation) which employs the rate-distortion optimization(RDO) method. Experimental results by applying the proposed method to various video sequences showed that the process time was decreased up to 80% comparing to the previous prediction methods. The degradation of video Quality was only from 0.05dB to 0.19dB and the compression ratio decreased as small as 0.58% in average. Therefore, we are sure that the proposed method is an efficient method for the fast inter prediction.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.71-78
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• 2008

In this paper, we implement the H.264/AVC baseline decoder by hardware-software partitioning under the embedded Linux Kernel 2.4.26 and the FPGA-based target board with ARM926EJ-S core. We design several IPs for the time-demanding blocks, such as motion compensation, deblocking filter, and YUV-to-RGB and they are communicated with the host through the AMBA bus protocol. We also try to minimize the number of memory accesses between IPs and the reference software (JM 11.0) which is ported in the embedded Linux. The proposed IPs and the system have been designed and verified in several stages. The proposed system decodes the QCIF sample video at 2 frame per second when 24MHz of system clock is running and we expect the bitter performance if the proposed system is designed with ASIC.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.1
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• pp.26-39
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• 2007

In recent years, rate control is an important technique in real time video communication applications using H.264/AVC. Many existing rate control algorithms employ the quadratic rate-distortion model, which is determine the target bits for each P frame. In this paper, a new rate control algorithm for transmission of H.264/AVC video bit stream through CBR(Constant Bit Rate) channel is proposed. The proposed algorithm predicts an adaptive QP(Quantization Parameter) for improving video distortion, due to high motion and abruptly scene change, which target bit rate and MAD(Mean of Absolute Difference) for current frame considering image complexity variance between previous and current frames. Additionally, it uses frame skip technique to maintain bit stream within a manageable range and protect buffer from overflow or underflow. Experimental results show that the proposed method gives a quality improvement of about 0.5dB when compared to previous rate control algorithm. Also our proposed algorithm encodes the video sequences with less frame skipping compared to the existing rate control for H.264/AVC.

• Proceedings of the Korea Information Processing Society Conference
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• 2008.11a
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• pp.86-89
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• 2008

본 논문에서는 H.264/AVC 비디오의 고속 부호화를 구현 하기 위하여 인터 프레임 상에서 움직임 벡터의 상관관계를 이용한 빠른 인트라 모드 스킵 알고리즘을 보인다. 제안한 인트라 모드 스킵은 이웃 블록 사이의 움직임 벡터간의 상관관계와 이전 프레임의 매크로블록(Macroblock)의 모드를 이용하여 인트라 예측을 생략함으로써 계산량을 줄이는 방법이다. 새로운 물체가 나타나거나 복잡한 움직임을 보이는 매크로블록들이 인트라 모드로 결정될 확률이 높기 때문에, 주변블록의 분산을 이용하여 임계값을 계산하고, 현재 매크로블록의 분산값과 비교하여 조건에 맞는 매크로블록에 대해 인트라 예측을 생략한다. 또한 시간적 상관관계가 높은 이전 프레임의 같은 위치의 매크로블록의 모드가 인트라 모드로 선택 되었을 경우, 인트라 예측을 실행한다. 제안한 방법으로 실험하였을 때, 기존의 논문과 비교하여 부호화 시간이 평균 26.02% 정도 감소하였다.

• Journal of Broadcast Engineering
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• v.19 no.2
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• pp.158-165
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• 2014

High Efficiency Video Coding (HEVC), the latest video coding standard, has twice of the compression efficiency compared to AVC/H.264 under the same image quality condition. To obtain the improved efficiency, however, it was adopted for many methods which need complicated calculation, and the time complexity of HEVC was increased more than that of AVC/H.264. To solve this problem, the various fast algorithms have been researched. In this paper, we propose a fast intra prediction mode decision method which uses result of Rough Mode Decision (RMD) and Most Probable Mode (MPM). The proposed method selects a best predicted mode by comparing each predicted directions which are calculated through RMD and MPM. We applied the proposed method to HM 10.0 and conducted an comparing experiment in All-Intra environment. The experiment result showed that total encoding time is reduced by about 26% on average with about a 0.8% loss of BD-rate.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.2
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• pp.26-32
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• 2008

Video compression schemes have been developed and used for many years. Currently, H.264/AVC is the most efficient video coding standard. The H.264/AVC baseline profile adopts CAVLC(Context-Adaptive Variable Length Coding) method as an entropy coding method. CAVLC gives better performance in compression ratios than conventional VLC(Variable Length Coding). However, because CAVLC decoder uses a lot of VLC tables, the CAVLC decoder requires a lot of area in terms of hardware. Conversely, since it must look up the VLC tables, it gives a worse performance in terms of software. In this paper, we propose a new hierarchical grouping method for the VLC tables. We can obtain an index of codes in the reconstructed VLC tables by simple arithmetic operations. In this method, the VLC tables are accessed just once in decoding a symbol. We modeled the proposed algorithm in C language, compiled under ARM ADS1.2 and simulated it with Armulator. Experimental results show that the proposed algorithm reduces execution time by about 80% and 15% compared with the H.264/AVC reference program JM(Joint Model) 10.2 and the arithmetic operation algorithm which is recently proposed, respectively.

• ETRI Journal
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• v.33 no.2
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• pp.155-162
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• 2011

The scalable extension of the H.264/AVC video coding standard (SVC) demonstrates superb adaptability in video communications. Joint source and channel coding (JSCC) has been shown to be very effective for such scalable video consisting of parts of different significance. In this paper, a new JSCC scheme for SVC transmission over packet loss channels is proposed which performs two-dimensional optimization on the quality layers of each frame in a rate-distortion (R-D) sense as well as on the temporal hierarchical structure of frames under dependency constraints. To compute the end-to-end R-D points of a frame, a novel reduced trellis algorithm is developed with a significant reduction of complexity from the existing Viterbi-based algorithm. The R-D points of frames are sorted under the hierarchical dependency constraints and optimal JSCC solution is obtained in terms of the best R-D performance. Experimental results show that our scheme outperforms the existing scheme of [13] with average quality gains of 0.26 dB and 0.22 dB for progressive and non-progressive modes respectively.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.4 s.316
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• pp.51-59
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• 2007

In this paper, we propose an efficient hardware architecture for H.264/AVC CAVLC (Context-based Adaptive Variable Length Coding) decoding which used for baseline profile and extended profile. Previous CAVLC architectures are consisted of five step block and each block gets effective bits from Controller block and Accumulator. If large number of non-zero coefficients exist, process for getting effective bits has to iterates many times. In order to reduce this unnecessary process, we propose two techniques, which combine five steps into four steps and reduce process to get efficiency bit by skipping addition step. By adopting these two techniques, the required processing time was reduced about 26% compared with previous architectures. It was designed in a hardware description language and total logic gate count was 16.83k using 0.18um standard cell library.