• 대한안전경영과학회지
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• 제6권4호
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• pp.215-226
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• 2004

This study develops a improved gate assignment algorithm and decision support system using its algorithm to extract a assignment result minimizing a walking distance of passengers in airport and maximizing the utilization rate of avaliable gates in domestic airports. By operation support system, it may contribute greatly in efficient enlargement of airport operation and increase the airport reliability through quickly coping with takeoff and landing delay of flight due to weather change, preservation and repair of gate, etc. Also, passengers who use airport terminal can minimize time and walking distance for departure, arrival, and transit, and it may greatly reduce the additional operation cost for common gates through maximizing the utilization rate for exclusive usage gates for airplanes which use gates.

• 대한안전경영과학회:학술대회논문집
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• 대한안전경영과학회 2004년도 추계학술대회
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• pp.221-227
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• 2004

This study develops a improved gate assignment algorithm and decision support system using its algorithm to extract a assignment result minimizing a walking distance of passengers in airport and maximizing the utilization rate of avaliable gates in domestic airports. By operation support system, it may contribute greatly in efficient enlargement of airport operation and increase the airport reliability through quickly coping with takeoff and landing delay of flight due to weather change, preservation and repair of gate, etc. Also, passengers who use airport terminal can minimize time and walking distance for departure, arrival, and transit, and it may greatly reduce the additional operation cost for common gates through maximizing the utilization rate for exclusive usage gates for airplanes which use gates.

• 한국농공학회:학술대회논문집
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• 한국농공학회 2005년도 학술발표논문집
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• pp.313-317
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• 2005

This study aimed to estimate applicability of a model to simulate circulation in estuarine lake caused by operation of drainage gates. The model consists of 2D (depth-averaged) hydrodynamic models, Delft3D-FLOW model and operation model for drainage gates. The flow through drainage gates was calculated using weir formulae with discharge coefficient, 0.8. The simulations are performed under two conditions: uncontrolled condition and controlled by periods of two days. The results on simulation of the model showed that the water level in estuarine lake was tend to increase above mean sea level. Therefore it was proved that the calibration and verification were needed in order to applicate this model for Saemankeum area.

• 한국정보통신학회논문지
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• 제10권9호
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• pp.1538-1544
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• 2006

본 논문은 $GF(2^m)$상의 n차 기 약 AOP를 적용하여 비-시스토릭 병렬 $AB^2+C$ 연산기를 제안한다. 본 논문에서 제안한 연산기 회로는 AND게이트와 EX-OR 게이트만을 사용하여 설계되어지며, 설계된 회로는 기약 AOP의 특성을 이용하여 게이트를 사용하지 않고 결선으로만 연결되어 게이트 및 지 연시간이 없는 순환이동과, m개의 AND 게이트와 m개의 EX-OR게이트를 필요로 하는 승산연산, EX-OR게이트로만 구성되어지는 멱승연산, 승산연산과 멱승연산을 이용한 파워섬연산 및 가산연산 등이 사용된다. 제안된 연산기 법은 AND게이트와 EX-OR게이트만을 사용함으로 고속의 데이터 처리, 저전력 및 집적화 등의 장점이 있으며, $T_A+(1+[log^m_2])T_X$의 연산 지연시간을 갖는다.

• Journal of information and communication convergence engineering
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• 제6권3호
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• pp.337-342
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• 2008

Controlling spillway gates of dams is a complex, nonlinear, non-stationary control process and is significantly affected by hydrological conditions which are not predictable beforehand. In this paper, control methods based on dynamic fuzzy control are proposed for the operation of spillway gates of dams during floods. The proposed methods are not only suitable for controlling spillway gates but also able to maintain target water level in order to prepare a draught. In the proposed methods, we use dynamic fuzzy control that the membership functions can be varied by changing environment conditions for keeping up the target water level, instead of conventional static fuzzy control. Simulation results demonstrate that the proposed methods based on dynamic fuzzy control produce an accurate and efficient solution for both of controlling spillway gates and maintaining target water level defined beforehand.

• Nuclear Engineering and Technology
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• 제48권2호
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• pp.386-403
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• 2016

The safety of nuclear power plants is analyzed by a probabilistic risk assessment, and the fault tree analysis is the most widely used method for a risk assessment with the event tree analysis. One of the well-known disadvantages of the fault tree is that drawing a fault tree for a complex system is a very cumbersome task. Thus, several graphical modeling methods have been proposed for the convenient and intuitive modeling of complex systems. In this paper, the reliability graph with general gates (RGGG) method, one of the intuitive graphical modeling methods based on Bayesian networks, is improved for the reliability analyses of dynamic systems that have various operation modes with time. A reliability matrix is proposed and it is explained how to utilize the reliability matrix in the RGGG for various cases of operation mode changes. The proposed RGGG with a reliability matrix provides a convenient and intuitive modeling of various operation modes of complex systems, and can also be utilized with dynamic nodes that analyze the failure sequences of subcomponents. The combinatorial use of a reliability matrix with dynamic nodes is illustrated through an application to a shutdown cooling system in a nuclear power plant.

• 한국농공학회:학술대회논문집
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• 한국농공학회 2005년도 학술발표논문집
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• pp.306-312
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• 2005

Gates for the purpose of drainage are classified following the types of structure as: Radial Gate, Sluice Gate, Rolling Gate, Drum Gate. In many cases of the reclamation project the sluice type of gates are applied. Different from this general trend, however the radial type of gate was adopted in the Saemangeum project. In this case the discharge coefficients which are used for the sluice type of gate was applied. To estimate the correct amount of discharge which will be evacuated through the gates, therefore the proper discharge coefficients should be estimated before the operation of the gates. The discharge coefficients were estimated through the physical hydraulic modeling, and we got the results as: $0.72{\sim}0.84$ for the submerged condition on the both sides of upstream and downstream, $0.62{\sim}0.83$ for the free surface condition on the downtream side only, and $1.04{\sim}1.12$ for the free surface condition on the both sides of upstream and downstream. The discharge coefficients obtained from the experiments are greater than those of the sluice gates in the design criteria. From the results of the study we may expect that in the Saemangeum project the radial gates could evacuate larger amount of discharge than the originally designed discharge, so that we may sure that the Saemangeum gates have enough capability to control the evacuation of water not only in the usual period but also in the flooding season.

• Journal of the Optical Society of Korea
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• 제16권4호
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• pp.432-442
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• 2012

In this paper, we propose, analyze and simulate the performances of some new plasmonic logic gates in two dimensional plasmonic waveguides with nanodisk resonators, using the numerical method of finite difference time domain (FDTD). These gates, including XOR, XNOR, NAND, and NOT, can provide the highly integrated optical logic circuits. Also, by cascading and combining these basic logic gates, any logic operation can be realized. These devices can be utilized significantly in optical processing and telecommunication devices.

• 대한임베디드공학회논문지
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• 제7권3호
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• pp.121-127
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• 2012

An integrated crypto engine for encryption and decryption of AES algorithm based on unified data-path architecture is efficiently designed and implemented in this paper. In order to unify the design of encryption and decryption, internal steps in single round is adjusted so as to operate with columns after row operation is completed and efficient method for a buffer is developed to simplify the Shift Rows operation. Also, only one S-box is used for both key expansion and crypto operation and Key-Box saving expended key is introduced provide the key required in encryption and decryption. The functional simulation based on ModelSim simulator shows that 164 clocks are required to process the data of 128bits in the proposed engine. In addition, the proposed engine is implemented with 6,801 gates by using Xilinx Synthesizer. This demonstrate that 40% gates savings is achieved in the proposed engine, compared to individual designs of encryption and decryption engine.

• 대한전자공학회논문지SD
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• 제44권9호
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• pp.54-58
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• 2007

LTPS TFT의 개발과 성능 향상은 패널에 다양한 디지털 회로를 내장하는 SOP의 비약적 발전에 기여하였다. 본 논문에서는 일반적으로 적용되는 낮은 성능의 CMOS 논리게이트를 대체할 수 있는 전류모드 논리(CML) 게이트의 설계 방법을 소개한다. CML 인버터는 낮은 로직스윙, 빠른 응답 특성을 갖도록 설계할 수 있음을 보였으며 높은 소비전력의 단점도 동작 속도가 높아질수록 CMOS의 경우와 근사해졌다. 아울러 전류 구동능력을 키울 필요가 없는 까닭에 많은 수의 소자가 사용되지만 면적은 오히려 감소하는 것을 확인하였다. 특히 비반전 및 반전 출력이 동시에 생성되므로 noise immunity가 우수하다. 다수 입력을 갖는 NAND/AND 및 NOR/OR 게이트는 같은 회로에 입력신호를 바꾸어 구현할 수 있고 MUX와 XNOR/XOR 게이트도 같은 회로를 사용하여 구현할 수 있음을 보였다. 결론적으로 CML 게이트는 다양한 함수를 단순한 몇가지의 회로로 구성할 수 있으며 낮은 소비전력, 적은 면적, 개선된 동작속도 등을 동시에 추구할 수 있는 대안임을 확인하였다.