• 대한전자공학회논문지TC
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• 제48권1호
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• pp.77-83
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• 2011

본 논문에서는 차세대 무선통신 중계기 및 기지국용 50W급 Doherty 전력증폭기를 설계 및 제작하였다. Doherty 전력증폭기의 보조증폭기를 구현하기 위하여 Gate 바이어스 조절회로를 사용하였다. Gate 바이어스 조절회로는 보조증폭기를 구현할 수 있으나 Doherty 전력증폭기의 출력특성을 개선하기에는 제한된 특성을 가졌다. 이를 해결하고자 Drain 바이어스 조절회로를 첨가였다. 그리고 Doherty 전력증폭기의 효율을 개선하고자 일반적인 2-way 구조가 아닌 3-way 구조를 적용하여 3-way GDCD(Gate and Drain Control Doherty) 전력증폭기를 구현하였다. 비유전율(${\varepsilon}r$) 4.6, 유전체 높이(H) 30 Mill, 동판두께(T) 2.68 Mill(2 oz)인 FR4 유전체를 사용하여 마이크로스트립 선로와 칩 캐패시터로 정합회로를 구성하였다. 실험결과 3GPP 동작 주파수 대역인 2.11GHz ~ 2.17GHz에서 이득이 57.03 dB이고, PEP 출력이 50.30 dBm, W-CDMA 평균전력 47.01 dBm, 5MHz offset 주파수대역에서 -40.45 dBc의 ACLR로써 증폭기의 사양을 만족하였다. 특히 3-way GDCD 전력증폭기인 일반전력증폭기에 비해 동일 ACLR에 대하여 우수한 효율 개선성능을 보였다.

• 대한한의정보학회지
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• 제14권2호
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• pp.47-57
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• 2008

This paper aims at the comparative study of practicing Buddhism and Taoism related to "life gate". The term "life gate", as a physiological entity of disputed morphological identity, first appears in The Inner Canon where it refers to the eyes. Reference to a "life gate" as an internal organ body first appears in The Classic of Difficult Issues which states, "The two kidneys are not both kidneys' The left one is the kidney, and the right is the life gate." Successive scholars refers to life gate as a gi point of Taoists.. The question of the life gate invited little discussion until the Myeong and Cheong Dynasty, when various different theories were put forward. Especially Jin Sa-taek says "life gate" is the governor of the twelve place in the human body, throwing light on the meaning of it. Not that life gate denotes a local point, it does a system of life gate. Generally speaking, life gate designates cinnabar field. I think that the human body produces essence by way of life gate. That is, the human body is unified by the system of life gate. Life gate is not only the source of infusing the engine of the human body with vital energy but also as well as gi-point.

• 전자공학회논문지C
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• 제36C권6호
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• pp.37-43
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• 1999

고성능 VLSI 설계를 위한 pipeline 형태의 Reed-Solomon을 구현하였다. Shortened RS code의 경우에 있어서 기존의 parallel recursive cell 방식이나[1] 다중 클락 설계와 같은 접근과는 달리 작은 면적에서 단일 클락으로 동작할 수 있는 이중 수소(two-way addressing) 방식의 Euclid 계산을 제안하였다. 이러한 방식은 recursive cell을 병렬 처리하는 Euclid 계산 방식에 비해 면적이나 소비 전력에 있어 장점을 갖고 있음을 synthesis와 전력 모의실험을 통해 검증하였다. 본 설계는 면적상으로 parallerl recursive cell을 이용한 단일 클락euclid 회로가 약 5,000 gate임에 비하여 40% 정도 감소한 3,000 gate 정도에 구현할 수 있었다. 또한 전력 소비면으로는 기존의 recursive cell을 이용한 다중 클락 euclid 회로가 6mW 이상의 전력을 소비하는 반면에 본 설계는 3mW대의 전력 소비를 보여 현격한 차이를 보였다.

• 한국항해항만학회지
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• 제42권6호
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• pp.446-452
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• 2018

항로는 선박의 통항이 빈번하여 사고의 위험이 높은 지역이지만, 선박의 통항분포에만 초점을 맞춘 연구가 다수였으며, 항로의 특성과 선박의 크기별 통항패턴에 대한 연구는 부족하였다. 이에 본 연구에서는 3개의 주요 항로에서의 통항분포와 통항패턴을 분석하기 위해서 3일간의 선박의 통항현황을 조사하였다. 통항현황을 바탕으로 항로를 10개의 Gate line으로 구분하고 각 Gate line을 통과하는 선박크기를 소형선, 중형선, 대형선으로 세 분류하여 분석하였다. 각 항로의 통항분석을 바탕으로 각 Gate line에서의 통항분포에 대하여 ND-K-S(Normal Distribution-Kurtosis-Skewness)를 적용하여 평가하였다. ND 평가 결과 통항분포에서 대형선은 정규분포를, 중형선은 편도항로에서만 정규분포를 만족하고, 소형선은 정규분포를 만족하지 않는 것으로 평가되었다. K-S 평가 결과 통항패턴은 왕복항로와 편도항로에서 뚜렷한 구분을 보였다. K 평가의 결과 편도항로에서는 고루 항로를 이용하는 통항패턴을 가지지만, 왕복항로에서는 항로의 한 부분에 집중하는 통항패턴을 가지는 것으로 평가되고, S 평가의 결과 편도항로에서는 항로의 중앙을 따라 항행하는 통항패턴을 가지지만, 왕복항로에서는 항로의 우측에 치우치는 통항패턴을 가지는 것으로 평가되었다. 다만 본 연구는 3개의 주요 항로를 비교한 만큼 향후 다양한 환경에서의 항로분석이 필요할 것으로 판단된다.

• Advances in nano research
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• 제3권1호
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• pp.49-54
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• 2015

The structure represents symmetrical metal electrode (gate 1) - front $SiO_2$ layer - n-Si nanowire FET - buried $SiO_2$ layer - metal electrode (gate 2). At the symmetrical gate voltages high conductive regions near the gate 1 - front $SiO_2$ and gate 2 - buried $SiO_2$ interfaces correspondingly, and low conductive region in the central region of the NW are formed. Possibilities of applications of nanosize FETs at the deep inversion and depletion as a distributed capacitance are demonstrated. Capacity density is an order to ${\sim}{\mu}F/cm^2$. The charge density, it distribution and capacity value in the nanowire can be controlled by a small changes in the gate voltages. at the non-symmetrical gate voltages high conductive regions will move to corresponding interfaces and low conductive region will modulate non-symmetrically. In this case source-drain current of the FET will redistributed and change current way. This gives opportunity to investigate surface and bulk transport processes in the nanosize inversion channel.

• 대한건축학회논문집:계획계
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• 제34권5호
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• pp.109-118
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• 2018

Noryang Temporary Palace was a place where king Jeongjo (1752-1800) would have lunch after crossing the Temporary Palace River on his way to Hwaseong Temporary Palace to worship at Hyeonryungwon, the tomb of his father, Sadoseja. The government offices in charge of ship bridge construction 'Jugyosa' and 'Byeoljangso' were located in the Temporary Palace. The central buildings of the Haenggung Palace, which ranged up to Yongyangbongjeojeong, were arranged to observe both 'Jugyosa' and 'Byeoljangso' from the Temporary Palace by lifting the ground from Sammun Gate to Yongyangbongjeojeong. Yongyangbongjeojeong, the center of Noryang Temporary Palace, features the style of royal palace architecture and functions of housing architecture. The 'Jugyosa' and 'Byeoljangso' buildings had eight quarters. According to the records, in addition, 15 wood sheds, 5 rice hubs, 3 barns, 1 side gate quarter, 1 front gate, 70 separate sheds, 2 suragan temporary buildings, oesammun gate and hongsalmun gate were found. Such architectural layout is matched with the Temporary Palace Jugyohwaneodo Painting.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2000년도 춘계학술대회논문집A
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• pp.741-744
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• 2000

In general there occur warpage in one way long part. Warpage is caused by differential shrinkage-Orientation Effect, Volumetric Shrinkage Effect, Differential Cooling Effect -over the part. Deco-Top is located at the top of 29"TV set and it's shape is one way long$(626{\times}130mm)$. Material is used transparency ABS resin. So we can't design ribs in this part. And we use film gate to avoid weld line. In these reasons we must develop no ribs and no warpage product. In this study we use MOLDFLOW's software-MF/FLOW, MF/COOL, MF/WARP. Using MF/FLOW, set the flow balance and gate positioning. And we can set cooling channel layout and the optimum processing condition through MF/COOL and MF/WARP. In result we reduced trials and obtained good product.

• 반도체디스플레이기술학회지
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• 제19권3호
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• pp.73-76
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• 2020

The physics-based compact gate leakage current noise models in nanoscale MOSFETs are developed in such a way that the models incorporate important physical effects and are suitable for circuit simulators, including QM (quantum-mechanical) effects. An emphasis on the trap-related parameters of noise models is laid to make the models adaptable to the variations in different process technologies and to make its parameters easily extractable from measured data. With the help of an accurate and generally applicable compact noise models, the compact noise models are successfully implemented into BSIM (Berkeley Short-channel IGFET Model) format. It is shown that the noise models have good agreement with measurements over the frequency, gate-source and drain-source bias ranges.

• 전력전자학회논문지
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• 제27권1호
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• pp.9-17
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• 2022

The series-connected semiconductor devices structure is one way to achieve a high voltage rating. However, a problem with voltage imbalance exists in which different voltages are applied to the series-connected switches. This paper proposed a new voltage balancing technique that controls the turn-off delay time of the switch by adding one bipolar junction transistor to the gate turn-off path. The validity of the proposed method is proved through simulation and experiment. The proposed active gate driver not only enables voltage balancing across a variety of current ranges but also has a greater voltage balancing performance compared with conventional RC snubber methods.

• 한국실내디자인학회논문집
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• 제26권4호
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• pp.84-92
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• 2017

Just as the front gate is located at the meeting point between the house and the street, the Subject and the Other face each other the same way. This study examines the relationship between House(subject) and Stree (other) at the boundary of the Front Gate-Face. Pursuing the aspects of the changing Front Gate-Face accordingly to the attitude of the Subject facing the Other, this study tries to analyze the possibilities and significance of the hospitality Front Gate-Face with the ethical point of view of Levinas. As architectural instance, results of examining the Front Gate-Face of traditional houses in Korea, China and Japan are as follows. Front Gate-Face of China is characterized by self-centered introversion to interact with the external world (the other). Front Gate-Face of Japan is characterized by a humble submission to the group. Front Gate-Face of Korea shows however more flexible relationship orientations in terms of hospitality, compared to Japan or China. When looking through hospitality factors, accordingly to the above mentioned Korean hospitality characteristics, the possibilities seem not be exclusively bordered inside the conceptual category perimeter suggested by Levinas' concept of hospitality. It is almost impossible for the nowadays ever-strong privacy culture to not allow room for the architectural structure of an absolute hospitality toward others. However, this impossibility not being absolute, still yields a space for a significant possibility to explore.