• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.2
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• pp.135-144
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• 2008

A bootstrap circuit is widely used for the floating gate power supply of Intelligent power module (IPM). A bootstrap circuit is simple and inexpensive. However, the duty cycle and on-time are limited by the requirement to refresh the charge in the bootstrap capacitor. And the value of the bootstrap capacitor should be increased as the switching frequency decreases. A charge pump circuit can be used to overcome the problems. This paper deals with an analysis and design of a charge pump circuit for the floating gate power supply of an IPM. The simulation and experiment are carried out for an induction motor drive system. The results well verifies the validity of the proposed circuit and design method.

• Journal of Power Electronics
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• v.11 no.2
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• pp.218-227
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• 2011

The subject of variable step size maximum power point tracking (MPPT) algorithms has been addressed in the literature. However, most of the addressed algorithms tune the variable step size according to two variables: the photovoltaic (PV) array voltage ($V_{PV}$) and the PV array current ($I_{PV}$). Therefore, both the PV array current and voltage have to be measured. Recently, maximum power point trackers that arc based on a single variable ($I_{PV}$ or $V_{PV}$) have received a great deal of attention due to their simplicity and ease of implementation, when compared to other tracking techniques. In this paper, two methods have been proposed to design a variable step size MPPT algorithm using only a single current sensor for stand-alone battery storage PV systems. These methods utilize only the relationship between the PV array measured current and the converter duty cycle (D) to automatically adapt the step change in the duty cycle to reach the maximum power point (MPP) of the PV array. Detailed analyses and flowcharts of the proposed methods are included. Moreover, a comparison has been made between the proposed methods to investigate their performance in the transient and steady states. Finally, experimental results with field programmable gate arrays (FPGAs) are presented to verify the performance of the proposed methods.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.100-103
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• 2008

In this paper, we propose H.264 Encoder integrating Intra Prediction, Deblocking filter, Context-Based Adaptive Variable Length Coding, and Motion Estimation encoder module. This designed module can be operated in 440 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 9.4 and verified the our developed hardware using test vector generated by reference C. The designed circuit can be operated in 166MHz clock system, and has 1800k gate counts using Charterd 0.18um process including SRAM memory. Manufactured chip has the size of $6{\times}6mm$ and 208 pins package.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.4
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• pp.300-304
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• 2008

A novel characterization method was investigated to estimate the trap generation during the program /erase cycles in nand flash memory cell. Utilizing Fowler-Nordheim tunneling current, floating gate potential and oxide electric field, we established a quantitative model which allows the knowledge of threshold voltage (Vth) as a function of either program or erase operation time. Based on our model, the derived results proved that interface trap density (Nit) term is only included in the program operation equation, while both Nit and oxide trap density (Not) term are included in the erase operation equation. The effectiveness of our model was tested using 50 nm nand flash memory cell with floating gate type. Nit and Not were extracted through the analysis of Program/Erase speed with respect to the endurance cycle. Trap generation and cycle numbers showed the power dependency. Finally, with the measurement of the experiment concerning the variation of cell Vth with respect to program/erase cycles, we obtained the novel quantitative model which shows similar results of relationship between experimental values and extracted ones.

• Corrosion Science and Technology
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• v.7 no.6
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• pp.328-331
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• 2008

Corrosion behaviour of water intake gate steel structures with different protective measures was investigated. Five material alternatives were taken for investigation, including: imported and recycled stainless steel, carbon steel with hot zinc spraying, painting and composite coatings. Results of corrosion rate for carbon steel, SUS 304, hot zinc spray coats in three water systems of Mekong river basin (saline, blackish and fresh) were also presented. Corrosion rate of carbon steel decreased with decreasing salinity in the investigated water environments. Meanwhile, these values for zinc coated steel, behaved by another way. Environmental data for these systems were filed and discussed in relation with corrosion characteristics. Method of Life Cycle Assessment (LCA) was applied in materials selection for water intake gate construction. From point of Life Cycle Cost (LCA) the following ranking was obtained: Zinc sprayed steel < Recycled stainless steel < Composite coated steel < Painting steel < SUS 304 From investigated results, hot zinc spray coating has been applied as protective measure for steel structures of water intake systems in Mekong river basin.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.237-240
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• 2005

This paper propose an novel CAVLC architcture for H.264 and designed the CAVLC module which can be used in AMBA based design. This designed module can be operated in 420 cycle for one-macroblock and support both long-start code method using Annex B.1 and RTP. To verify the CAVLC architecture, we developed the reference C from JM8.5 and verified the our developed hardware using test vector generated by reference C. The designed circuit can be operated in 54MHz clock system, and has 14096 gate counts using Hynix 0.35 um TLM process.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.12
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• pp.2647-2654
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• 2009

In this paper, we propose H.264 Encoder integrating Intra Prediction, Deblocking Filter, Context-Based Adaptive Variable Length Coding, and Motion Estimation encoder module. This designed module can be operated in 440 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 9.4 and verified the our developed hardware using test vector generated by reference C. The designed circuit can be operated in 166MHz clock system, and has 1800K gate counts using Charterd 0.18 um process including SRAM memory. Manufactured chip has the size of $6{\times}6mm$ and 208 pins package.

• Journal of Power Electronics
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• v.10 no.4
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• pp.342-350
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• 2010

Randomizing the switching frequency (RSF) to reduce the electromagnetic interference (EMI) of switching power converters is a well-known technique that has been previously discussed. The randomized pulse position (RPP) technique, in which the switching frequency is kept fixed while the pulse position (the delay from the starting of the switching cycle to the turn-on instant within the cycle) is randomized, has been previously addressed in the literature for the same purpose. This paper presents a double-hybrid technique (DHB) for EMI reduction in dc-dc switching regulators. The proposed technique employed both the RSF and the RPP techniques. To effectively spread the conducted-noise frequency spectrum and at the same time attain a satisfactory output voltage quality, two parameters (switching frequency and pulse position) were randomized, and a third parameter (the duty ratio) was controlled by a digital compensator. Implementation was achieved using field programmable gate array (FPGA) technology, which is increasingly being adopted in industrial electronic applications. To evaluate the contribution of the proposed DHB technique, investigations were carried out for each basic PWM, RPP, RSF, and DHB technique. Then a comparison was made of the performances achieved. The experimentally investigated features include the effect of each technique on the common-mode, differential-mode, and total conducted-noise characteristics, and their influence on the converter’s output ripple voltage.

• Proceedings of the Korea Technical Association of the Pulp and Paper Industry Conference
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• 2002.11a
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• pp.228-233
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• 2002

In this study, Life Cycle Assessment method has been carried out the Corrugated board box in considering environmental aspects by quantifying the environmental emission and assessing its environmental impact potential. The system boundary in this study is selected from cradle to gate stage(raw material acquisition, raw material production and product manufacturing) of the paper product. To evaluate the environmental impact potential, impact categories are divided into 8 categories. As a results, abiotic resource depletion of the impact categories has the largest contribution to the total impact potential as 31.02% of total, Next were continued ecotoxicity having a contribution of 27.17%. In the life cycle, environmental impacts from law material production stage were contributed largely as 80.78%.

• Proceedings of the KSME Conference
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• 2001.11b
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• pp.878-884
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• 2001

IGCC(Integrated Gasification Combined Cycle) power plant are becoming more attractive because of fuel flexibility and low emission. In this study, performances are evaluated when the low caloric value syngas fuels producted in gasification process is used a gas turbine originally designed naturel gas fuel. Using GateCycle computational thermal analysis model, performances of GE 7FA gas turbine are predicted for using four types of syngas. Also, off design performance is presented for firing syngas fuel in the gas turbine.