• Title/Summary/Keyword: Gate Pattern

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Development on the Process Control System for Full Gate Visual Test of LCD Manufacturing Process (LCD 생산공정의 전게이트 시각 검사를 위한 공정 제어장치 개발)

  • Park, Hyoung-Keun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.7
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    • pp.1725-1728
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    • 2009
  • This research developed process control device and FGV pattern generating device essential for full gate visual inspection to improve process so that defect detection capability may be maximized in specified environment. The devices developed in this research, which can be swiftly replaced in case loss or error occurs, are anticipated to improve module yield as well as maintain tact loss near '0'. In addition, as a result of mounting H/W and S/W system to control detailed operation sequence in production line and executing performance check and verification, detection rates were 98.1% and 99.1% respectively for pixel defect by tact and line defect, and yield of the entire module process including gate and visual level test increased up to 98.3%.

Study on the Activation Energy of Charge Migration for 3D NAND Flash Memory Application (3차원 플래시 메모리의 전하 손실 원인 규명을 위한 Activation Energy 분석)

  • Yang, Hee Hun;Sung, Jae Young;Lee, Hwee Yeon;Jeong, Jun Kyo;Lee, Ga won
    • Journal of the Semiconductor & Display Technology
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    • v.18 no.2
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    • pp.82-86
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    • 2019
  • The reliability of 3D NAND flash memory cell is affected by the charge migration which can be divided into the vertical migration and the lateral migration. To clarify the difference of two migrations, the activation energy of the charge loss is extracted and compared in a conventional square device pattern and a new test pattern where the perimeter of the gate is exaggerated but the area is same. The charge loss is larger in the suggested test pattern and the activation energy is extracted to be 0.058 eV while the activation energy is 0.28 eV in the square pattern.

Simulation of Pollutants Transport using 2-D Advection-Dispersion Model near Intake Station (2차원 이송-확산모형을 이용한 취수장 인근에서의 오염물질의 혼합거동 모의)

  • Kim, Jae-Dong;Kim, Young-Do;Lyu, Si-Wan;Seo, Il-Won
    • 한국방재학회:학술대회논문집
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    • 2008.02a
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    • pp.791-794
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    • 2008
  • The transport and dispersion of pollutants in natural river is a principal issue in intake station management. To study the pollutant transport in natural rivers, the effect of meandering and confluence of tributary on mixing process have to analyzed. The objective of this study is to simulate the mixing and transport of pollutants for operating water gate of Nakdong Estuary Barrage around the intake station. Mulgeum intake station being used as drinking water sources for Pusan. The flow around the intake station is influenced by operating water gate of Nakdong Estuary Barrage which is located downstream. The water gate system includes ten individual gates. The minor gate is usually opened according to elevation of the sea. When the river flow increases, the main water gate is opened. Daepo stream, tributary of the Nakdong river, is on opposite side of the intake station. The pollutants from Daepo stream often flows into the intake station acoording to the flow pattern. In this study, based on this simulation results, proper water gate operation which can minimize negative impact will be provided.

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Simulation of Ceramic Powder Injection Molding Process to Clarify the Change of Sintering Shrinkage Depending on Flow Direction (유동방향과 밀도이방성 분석을 위한 세라믹 분말사출성형 해석)

  • Kwak, Tae-Soo;Seo, Won-Seon
    • Journal of the Korean Ceramic Society
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    • v.46 no.3
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    • pp.229-233
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    • 2009
  • This study has focused on manufacturing technique of powder injection molding of watch case made from zirconia powder. A series of computer simulation process was applied to prediction of the flow pattern in the inside of the mould to clarifying the change of sintering shrinkage depended on flow direction. The material properties of melted feedstock inclusive of the PVT graph and thermal viscosity flowage properties were measured for obtaining the input data in computer simulation. Also, molding experiment was conducted and the results of experiment showed that good agreement with simulation results for flow pattern and weld line location. On the other hand, gravity and inertia effect have an influence on velocity of melt front because of high density of ceramic powder particles in powder injection molding against the polymer injection molding process. In the experiment, the position of melt front was compared with upper gate and lower gate position. The gravity and inertia effect could be confirmed in the experimental results.

Ceramic injection molding of the watch case composed by zirconia$(ZrO_2)$ powder (지르코니아$(ZrO_2)$ 분말을 이용한 시계케이스의 세라믹 사출성형)

  • Kwak T.S.;Shin H.Y.;Lim J.I.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.10a
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    • pp.275-278
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    • 2005
  • This study has focused on manufacturing technique of powder injection molding of watch case which made from zirconia powder. A series of computer simulation process was applied to prediction of the flow pattern in the inside of the mould and defects as weld line. The material properties of melted feedstock inclusive of the PVT graph and thermal viscosity flowage properties were measured for obtaining the input data in computer simulation. Also, molding experiment was conducted and the results of experiment showed that good agreement with simulation results far flow pattern and weld line location. On the other hand, gravity and inertia effect have an influence on velocity of melt front because of high density of ceramic powder particles in powder injection molding against the polymer injection molding process. In the experiment, the position of melt front was compared with upper gate and lower gate position. The gravity and inertia effect could be confirmed in the experimental results.

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Study on the measurement of blasting vibration response in construction a subway station at East gate of cultural treasure (지하철건설에 따른 문화재 보호와 동대문역사시공 보고서(1))

  • Choi, Sang-Yol;Ree, Soo-Book;Huh, Ginn;Chai, Soo-Yun
    • Journal of the Korean Professional Engineers Association
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    • v.17 no.3
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    • pp.32-49
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    • 1984
  • The East gate station area is 205M long and 24m deep which is located 13 meter in front of cultural treasure east gate. The area to be excavated by blasting is composed of granite rocks from 10M depth to 25M. Surface earth extends to up 10M depth. This job site has in involves heavy traffic congestion such as over 10,000 cars passing in rush hour where clossing No 1 lint of subway running 3 minitues head way. This east gate station construction is to be executed for the provent of the setting down of underground level and blasting vibration effects to cultural treasure east gate. Therefore, the caltural treasure committee approved this execution subject to the following condition. 1. Subway gelogical foundation and measured natural frequency 2. Execution of water tight wall 3. Sellection and test of damping material for wall and under rail 4. Measurement of monitoring system during the execution 5. Measurement of histogram system The above two projects was carried out by Dr. Kwang team in KAIST and prof, Han in Hanyang University under accadamic study contract. In the blasting work, for the pourpose of reduced vibration and low explosion velocity such as CCR, Kovex slurry. The 2nd, used electrical caps shall be delay cap and M/S caps in multi delay. The 3rd, drilling pattern is bench cut in open cut and applied control blasting in tunnelling and also shall drill anti-vibration holes as line drilling.

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Photoinitiator-free Photosensitive Polyimide Gate Insulator for Organic Thin Film Transistor

  • Pyo, Seung-Moon;Lee, Moo-Yeol;Jeon, Ji-Hyun;Son, Hyun-Sam;Yi, Mi-Hye
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.885-888
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    • 2004
  • We have prepared and investigated the properties of photoinitiator-free photosensitive polyimide gate insulatos for organic thin-film transistors (OTFTs). The precursor was prepared from a dianhydride, 3,3',4,4'-Benzophenone tetracarboxylic dianhydride (BTDA) and novel aromatic diamine, 7-(3,5-diaminobenzoyloxy) coumarine (DA-CM). Photo-patternability of the polyimide precursor film and surface morphology of the films before and after photo-patterning process were investigated and negative pattern with a resolution of 50 ${\mu}m$ was obtained nicely. In addition, we have fabricated OTFTs with pentacene and photosensitive polyimide as a semiconductor and a gate insulator; respectively. According to the device geometry, the ${\mu}$, current modulation ratio and subthreshold swing of the devices were around 0.2${\sim}$0.4 $cm^2$/Vs, more than $10^5$ and around 3${\sim}$5 V/dec, respectively.

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Low Power Neuromorphic Hardware Design and Implementation Based on Asynchronous Design Methodology (비동기 설계 방식기반의 저전력 뉴로모픽 하드웨어의 설계 및 구현)

  • Lee, Jin Kyung;Kim, Kyung Ki
    • Journal of Sensor Science and Technology
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    • v.29 no.1
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    • pp.68-73
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    • 2020
  • This paper proposes an asynchronous circuit design methodology using a new Single Gate Sleep Convention Logic (SG-SCL) with advantages such as low area overhead, low power consumption compared with the conventional null convention logic (NCL) methodologies. The delay-insensitive NCL asynchronous circuits consist of dual-rail structures using {DATA0, DATA1, NULL} encoding which carry a significant area overhead by comparison with single-rail structures. The area overhead can lead to high power consumption. In this paper, the proposed single gate SCL deploys a power gating structure for a new {DATA, SLEEP} encoding to achieve low area overhead and low power consumption maintaining high performance during DATA cycle. In this paper, the proposed methodology has been evaluated by a liquid state machine (LSM) for pattern and digit recognition using FPGA and a 0.18 ㎛ CMOS technology with a supply voltage of 1.8 V. the LSM is a neural network (NN) algorithm similar to a spiking neural network (SNN). The experimental results show that the proposed SG-SCL LSM reduced power consumption by 10% compared to the conventional LSM.

Surface Roughness Evolution of Gate Poly Silicon with Rapid Thermal Annealing (미세게이트용 폴리실리콘의 쾌속 열처리에 따른 표면조도 변화)

  • Song, Oh-Sung;Kim, Sang-Yeop
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.6 no.3
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    • pp.261-264
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    • 2005
  • The 90 nm gate pattern technology have been virtualized by employing the hard mask and the planarization of fate poly silicon. We fabricated 70nm poly-Si on $200 nm-SiO_2/p-Si(100)$ substrates using low pressure chemical vapor deposition (LPCVD) to investigate roughness evolution by varying rapid annealing temperatures. The samples were annealed at the temperatures of $700^{\circ}C\~1100^{\circ}C$ for 40 seconds with a rapid thermal annealer. The surface image and the surface roughness were measured by a field emission scanning electron microscopy (FESEM) and an atomic force microscopy (AFM), respectively. The poly silicon surface became more rough as temperature increased due to surface agglomeration. The optimum conditions of poly silicon planarization were achieved by annealed at $700^{\circ}C$ for 40 seconds.

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An Experimental Study of Injection Molding for Multi-beam Sensing Lens Using The Change of Gate Geometry (금형 게이트 크기 변화에 따른 멀티빔 센서용 렌즈 사출성형성 향상에 관한 연구)

  • Cho, S.W.;Kim, J.S.;Yoon, K.H.;Kim, J.D.
    • Transactions of Materials Processing
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    • v.20 no.5
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    • pp.333-338
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    • 2011
  • Rapidly developing IT technologies in recent years have raised the demands for high-precision optical lenses used for sensors, digital cameras, cell phones and optical storage media. Many techniques are required to manufacturing high-precision optical lenses, including multi-beam sensing lenses investigated in the current study. In the case of injection molding for thick lenses, a shrinkage phenomenon often occurs during the process. This shrinkage is known to be the main reason for the lower optical quality of the lenses. In the present work, a CAE analysis was conducted simultaneously with experiments to understand and minimize this phenomenon. In particular, the sectional area of a gate was varied in order to understand the effects of packing and cooling processes on the final shrinkage pattern. As a result of this study, it was demonstrated that a dramatic reduction of the shrinkage could be obtained by increasing the width of the gate.