• 한국유체기계학회 논문집
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• 제10권5호
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• pp.20-26
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• 2007

Some gate valves are susceptible to pressure locking and thermal binding which prevent the safety function. The safety related gate valves susceptible to pressure locking and thermal binding shall be identified and taken preventive actions to ensure the safety function. The identification of the gate valves susceptible to pressure locking and thermal binding needs the evaluation of system design, valve and piping arrangement, test requirements, and operating conditions. Application of preventive methods should consider the system safety function, applicability, effectiveness, interface with system design, and cost. The selection procedure of valves susceptible to pressure locking and thermal binding can be effectively used in industry including nuclear power plants. In order to prevent the pressure locking, the hole can be drilled through the one disc of upstream side or down stream and the external equalizing line can be installed from bonnet to downstream or upstream. The double disc parallel seat valve type can be used instead of flexible wedge gate valve to prevent the thermal binding. The identification of gate valves susceptible to pressure locking and thermal binding, and preventive actions will meet the regulatory requirements and enhance the availability and safety of plants.

• 대한전자공학회논문지
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• 제21권5호
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• pp.67-78
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• 1984

프로팅 게이트 위에 컨트롤 게이트를 갖는 n-채널 이중 다결정 실리콘게이트 EAROM을 제작하였다. 채널 길이는 4-8μm, 채널 폭은 5-14μm로 하여 5μm design rule에 따라 설계하였으며 서로 다른 4가지 컨트롤게이트 구조를 갖는 채널 주입형 기억소자를 얻었다. 그리고 소자의 Punch through 전압과 게이트에 의해 조절되는 채널파괴 전압을 증가시키기 위해 이중 이온주입 (double ion implantation)과 active 영역에 보론이온을 주입 하였다. 프로그래밍을 위해 드레인 전압 및 게이트 전압이 각각 13-l7V 및 20-25V 정도 필요하였다. 그리고 제조된 기억소자의 소거는 광학적 방법뿐 아니라 전기적 방법으로도 가능하였으며 125℃에서 200시간 유지하였을 때 축적된 전자가 약 4 %정도 감소함을 알 수 있었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 B
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• pp.1333-1335
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• 2000

In order to turn on the SCR gate, trigger signal source have to provide appropriate gate current and voltage under the gate rating based on the characteristic of SCR, the nature of load and power. It will be essential design factors such as trigger source impedance, trigger signal occurring, signal time width and turn off conditions. Also minimum gate trigger current is changed with the deterioration of SCR. SCR, which is needed large gate trigger current absolutely, is very important for SCR characteristic test because it causes unstable output in the misfile or makes a trouble to pulse trigger circuits. This paper shows scheme to test the performance of SCR with the precision analyzing mechanism and the changing trend of minimum gate current under the trigger conditions.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
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• pp.1355-1357
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• 2005

This paper discusses Gate-driver circuit for improved switching characteristics. This resonant gate-driver recycles the energy stored in the gate capacitance to reduce the turn-off switching loss associated with a conventional gate-driver. Reducing the loss reduces the power consumption and hence the subsequent power dissipation in the resonant gate-driver. The design considerations of implementing a practical MOSFET gate-driver using this topology are discussed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1364-1366
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• 1998

An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay. pixel charging ratio, level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권5호
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• pp.554-562
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• 2015

This paper presents the design and analysis of gate-recessed AlGaN/GaN Fin-type Field-Effect Transistor (FinFET). The three-dimensional (3-D) technology computer-aided design (TCAD) simulations were performed to analyze the direct-current (DC) and radio-frequency (RF) characteristics for AlGaN/GaN FinFETs. The fin width ($W_{fin}$) and the height of GaN layer ($H_{GaN}$) are the design parameters used to improve the electrical performances of gate-recessed AlGaN/GaN FinFET.

• 대한기계학회논문집A
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• 제25권10호
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• pp.1575-1582
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• 2001

Injection molding is widely used in producing various plastic parts due to its high productivity, and the demand for injection molded products with high precision is increasing. To achieve successful product quality and precision, the design of gating and runner system in injection mold is very important because it influences the melt flow into the cavity. Some deflects, such as weld lines and overpacking, can be effectively controlled with proper selection of gate locations. In the present study, the design of gate locations in injection molding of a dashboard fur automobiles was carried out with CAMP mold, a PC-based simulation system for injection molding. A dummy runner system was developed to simulate a runner system in order to increase the efficiency of the analysis procedure. The numbers and locations of gates were iteratively determined in the present investigation. In this procedure, an acceptable design was obtained in terms of reducing the maximum pressure and clamping force.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2003년도 봄 학술발표논문집 Vol.30 No.1 (B)
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• pp.591-593
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• 2003

현재 모바일 서비스는 이동단말기와 더불어 발전하고 있다. 그러나 이동단말기 마다 다른 플랫폼을 가진 환경에서 유선인터넷 컨텐츠를 가지고 모바일 서비스하기 위해서는 마크업언어인 XML 기술을 이용한 변환이 필요하며 이것을 Trans-Gate System이라 한다. Trans-Gate System은 유선인터넷 컨텐츠를 모바일 디바이스 플랫폼(WML HDML, m-HTML)메 맞게 변환하는 시스템을 설계한다. 이 시스템은 X-Crawler와 Call Manager의 2가지 모듈로 나눠서 기존의 유선 인터넷에 있는 멀티미디어 컨텐츠를 사용자 Device에 맞게 변환하는 시스템이다. 따라서 이 시스템은 기존에 따로 모바일 서비스만을 위한 컨텐츠를 만들지 않아도 되는 장점이 있다.

• 한국정밀공학회지
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• 제23권8호
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• pp.119-126
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• 2006

Kriging model is widely used as design DACE(analysis and computer experiments) model in the field of engineering design to accomplish computationally feasible design optimization. In this paper, the optimization of gate valve was performed using Kriging based approximation model. The DACE modeling, known as the one of Kriging interpolation, is introduced to obtain the surrogate approximation model of the function. In addition, we describe the definition, the prediction function and the algorithm of Kriging method and examine the accuracy of Kriging by using validation method.

• Nuclear Engineering and Technology
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• 제48권4호
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• pp.1047-1057
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• 2016

Design engineering process for field programmable gate array (FPGA)-based reactor trip functions are developed in this work. The process discussed in this work is based on the systems engineering approach. The overall design process is effectively implemented by combining with design and implementation processes. It transforms its overall development process from traditional V-model to Y-model. This approach gives the benefit of concurrent engineering of design work with software implementation. As a result, it reduces development time and effort. The design engineering process consisted of five activities, which are performed and discussed: needs/systems analysis; requirement analysis; functional analysis; design synthesis; and design verification and validation. Those activities are used to develop FPGA-based reactor bistable trip functions that trigger reactor trip when the process input value exceeds the setpoint. To implement design synthesis effectively, a model-based design technique is implied. The finite-state machine with data path structural modeling technique together with very high speed integrated circuit hardware description language and the Aldec Active-HDL tool are used to design, model, and verify the reactor bistable trip functions for nuclear power plants.