• 제목/요약/키워드: Gate Design

검색결과 1,594건 처리시간 0.025초

LDD MOSFET채널 전계의 특성 해석 (Characterization of Channel Electric Field in LDD MOSFET)

  • 한민구;박민형
    • 대한전기학회논문지
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    • 제38권6호
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    • pp.401-415
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    • 1989
  • A simple but accurate analytical model for the lateral channel electric field in gate-offset structured Lightly Doped Drain MOSFET has been developed. Our model assumes Gaussian doping profile, rather than simple uniform doping, for the lightly doped region and our model can be applied to LDD structures where the junction depth of LDD is not identical to the heavily doped drain. The validity of our model has been proved by comparing our analytical results with two dimensional device simulations. Due to its simplicity, our model gives a better understanding of the mechanisms involved in reducing the electric field in the LDD MOSFET. The model shows clearly the dependencies of the lateral channel electric field on the drain and gate bias conditions and process, design parameters. Advantages of our analytical model over costly 2-D device simulations is to identify the effects of various parameters, such as oxide thickness, junction depth, gate/drain bias, the length and doping concentration of the lightly doped region, on the peak electric field that causes hot-electron pohenomena, individually. Our model can also find the optimum doping concentration of LDD which minimizes the peak electric field and hot-electron effects.

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Analysis of Electrical Characteristics According to Fabrication of 500 V Unified Trench Gate Power MOSFET

  • Kang, Ey Goo
    • Transactions on Electrical and Electronic Materials
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    • 제17권4호
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    • pp.222-226
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    • 2016
  • This paper investigated the trench process, unified field limit ring, and other products for the development of a 500 V-level unified trench gate power MOSFET. The optimal base chemistry for the device was found to be SF6. In SEM analysis, the step process of the trench gate and field limit ring showed outstanding process results. After finalizing device design, its electrical characteristics were compared and contrasted with those of a planar device. It was shown that, although both devices maintained a breakdown voltage of 500 V, the Vth and on-state voltage drop characteristics were better than those of the planar type.

All-Optical Binary Full Adder Using Logic Operations Based on the Nonlinear Properties of a Semiconductor Optical Amplifier

  • Kaur, Sanmukh;Kaler, Rajinder-Singh;Kamal, Tara-Singh
    • Journal of the Optical Society of Korea
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    • 제19권3호
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    • pp.222-227
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    • 2015
  • We propose a new and potentially integrable scheme for the realization of an all-optical binary full adder employing two XOR gates, two AND gates, and one OR gate. The XOR gate is realized using a Mach-Zehnder interferometer (MZI) based on a semiconductor optical amplifier (SOA). The AND and OR gates are based on the nonlinear properties of a semiconductor optical amplifier. The proposed scheme is driven by two input data streams and a carry bit from the previous less-significant bit order position. In our proposed design, we achieve extinction ratios for Sum and Carry output signals of 10 dB and 12 dB respectively. Successful operation of the system is demonstrated at 10 Gb/s with return-to-zero modulated signals.

MEMS 공정기술을 적용한 MOSFET형 수소센서의 설계, 제작에 관한 연구 (Design and Fabrication of MOSFET Type Hydrogen Gas Sensor Using MEMS Process)

  • 김범준;김정식
    • 대한금속재료학회지
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    • 제49권4호
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    • pp.304-312
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    • 2011
  • In this study, MOSFET type micro hydrogen gas sensors with platinum catalytic metal gates were designed, fabricated, and their electrical characteristics were analyzed. The devised MOSFET Hydrogen Sensors, called MHS-1 and -2, were designed with a platinum gate for hydrogen gas adsorption, and an additional sensing part for higher gas sensitivity and with a micro heater for operation temperature control. In the electrical characterization of the fabricated Pt-gate MOSFET (MHS-1), the saturated drain current was 3.07 mA at 3.0 V of gate voltage, which value in calculation was most similar to measurement data. The amount of threshold voltage shift and saturated drain current increase to variation of hydrogen gas concentration were calculated and the hydrogen gas sensing properties were anticipated and analyzed.

1960년대 광화문 중건과정의 특성 (The Characteristics of Gwanghwamun reconstruction in the 1960's)

  • 강난형;송인호
    • 건축역사연구
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    • 제24권6호
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    • pp.45-55
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    • 2015
  • After the Korean war, two major attempts were made to reconstruct Gwanghwamun Gate as an important part of Korea's lost cultural heritage. In December 2006, the Korean government replaced the concrete gate with a wooden one, yet traces of the attempts made in the 1960s to transform Gwanghwamun Gate and the main road remain to this day. At the time, the Third Republic of Korea, sought to legitimize itself in the name of modernity, and went on to modernize the architecture and urban landscape of Seoul. The location and design selected for the rebuilt Gwanghwamun illustrated the symbolic relationship between historic heritage and urban development. The reconstruction of the gate began as part of the Third Republic's project to restore the Central Administration Building and culminated in the transformation of the main road in front of the gate. By reconstructing the traditional gate using concrete, the military government intended to convey the message that we could inherit our proud tradition using modern materials, and that we should actively adopt the new technologies of the modern era. This study begins with the premise that the Gwanghwamun reconstruction project of 1968 represents the application of new technological thinking to Korea's architectural style, and has two objectives. The first is to summarize the reconstruction process and method using the records and drawings from the 1968 project, which was then under the leadership of architect Kang Bong-jin. The second is to analyze the characteristics of the architectural style and structure of the reconstructed Gwanghwamun so as to reinterpret the relationship between Korean tradition and modern technology.

Evaluation of Radio-Frequency Performance of Gate-All-Around Ge/GaAs Heterojunction Tunneling Field-Effect Transistor with Hetero-Gate-Dielectric by Mixed-Mode Simulation

  • Roh, Hee Bum;Seo, Jae Hwa;Yoon, Young Jun;Bae, Jin-Hyuk;Cho, Eou-Sik;Lee, Jung-Hee;Cho, Seongjae;Kang, In Man
    • Journal of Electrical Engineering and Technology
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    • 제9권6호
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    • pp.2070-2078
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    • 2014
  • In this work, the frequency response of gate-all-around (GAA) Ge/GaAs heterojunction tunneling field-effect transistor (TFET) with hetero-gate-dielectric (HGD) and pnpn channel doping profile has been analysed by technology computer-aided design (TCAD) device-circuit mixed-mode simulations, with comparison studies among ppn, pnpn, and HGD pnpn TFET devices. By recursive tracing of voltage transfer curves (VTCs) of a common-source (CS) amplifier based on the HGD pnpn TFET, the operation point (Q-point) was obtained at $V_{DS}=1V$, where the maximum available output swing was acquired without waveform distortion. The slope of VTC of the amplifier was 9.21 V/V (19.4 dB), which mainly resulted from the ponderable direct-current (DC) characteristics of HGD pnpn TFET. Along with the DC performances, frequency response with a small-signal voltage of 10 mV has been closely investigated in terms of voltage gain ($A_v$), unit-gain frequency ($f_{unity}$), and cut-off frequency ($f_T$). The Ge/GaAs HGD pnpn TFET demonstrated $A_v=19.4dB$, $f_{unity}=10THz$, $f_T=0.487$ THz and $f_{max}=18THz$.

Comparative Analysis on Positive Bias Stress-Induced Instability under High VGS/Low VDS and Low VGS/High VDS in Amorphous InGaZnO Thin-Film Transistors

  • Kang, Hara;Jang, Jun Tae;Kim, Jonghwa;Choi, Sung-Jin;Kim, Dong Myong;Kim, Dae Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제15권5호
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    • pp.519-525
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    • 2015
  • Positive bias stress-induced instability in amorphous indium-gallium-zinc-oxide (a-IGZO) bottom-gate thin-film transistors (TFTs) was investigated under high $V_{GS}$/low $V_{DS}$ and low $V_{GS}$/high $V_{DS}$ stress conditions through incorporating a forward/reverse $V_{GS}$ sweep and a low/high $V_{DS}$ read-out conditions. Our results showed that the electron trapping into the gate insulator dominantly occurs when high $V_{GS}$/low $V_{DS}$ stress is applied. On the other hand, when low $V_{GS}$/high $V_{DS}$ stress is applied, it was found that holes are uniformly trapped into the etch stopper and electrons are locally trapped into the gate insulator simultaneously. During a recovery after the high $V_{GS}$/low $V_{DS}$ stress, the trapped electrons were detrapped from the gate insulator. In the case of recovery after the low $V_{GS}$/high $V_{DS}$ stress, it was observed that the electrons in the gate insulator diffuse to a direction toward the source electrode and the holes were detrapped to out of the etch stopper. Also, we found that the potential profile in the a-IGZO bottom-gate TFT becomes complicatedly modulated during the positive $V_{GS}/V_{DS}$ stress and the recovery causing various threshold voltages and subthreshold swings under various read-out conditions, and this modulation needs to be fully considered in the design of oxide TFT-based active matrix organic light emitting diode display backplane.

한강유역(漢江流域) 댐군(群)의 수문조작방안(水門操作方案)에 관한 수문(水文) 해석(解析) (A Hydrological Analysis on the Gate Operation Rule of Dams in Han River Basin)

  • 이원환;조원철;이재준;허준행
    • 대한토목학회논문집
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    • 제5권1호
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    • pp.91-100
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    • 1985
  • 본(本) 연구(硏究)는 한강유역(漢江流域) 댐군(群)의 비상사태하(非常事態下)(큰 홍수파(洪水波) 유하시(流下時))에서의 수문조작(水門操作) 기준설정(基準設定)에 관한 것으로 얻어진 결과(結果)는 다음과 같다. 1) 수문조작(水門操作)을 저수위(貯水位)와 유입량(流入量)으로 실시(實施)할 수 있게끔 6개 댐(화천(華川), 춘천(春川), 소양강(昭陽江), 의암(衣岩), 청평(淸平), 인당(人堂)댐)에 대해 수문조작(水門操作) 기준(基準)을 수식화(數式化)하였다. 2) 수문(水門)의 개방면적(開放面積), 유입량(流入量), 저수위(貯水位), 방류량(放流量) 간의 다중회귀분석(多重回歸分析)에 의해서 얻어진 식(式)으로 홍수추적(洪水追跡)을 실시한 결과 그 적용가능성(適用可能性)을 확인(確認)하였다. 3) 본(本) 연구(硏究)에서 얻어진 수문조작(水門操作) 기준(基準)과 홍수추적방법(洪水追跡方法)을 사용(使用)하여 비상사태하(非常事態下)(큰 홍수파(洪水波) 유하시(流下時))에서의 각 댐을 검토(檢討)한 바, 모두 안전(安全)하였으나, 소양강(昭陽江), 의암(衣岩), 청평(淸平)댐만은 저수지(貯水池) 초기방류수위(初期放流水位)를 미리 저하(低下)시킨 상태(狀態)에서 수문조작(水門操作)이 이루어져야 할 것이다.

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Transparent and Flexible All-Organic Multi-Functional Sensing Devices Based on Field-effect Transistor Structure

  • Trung, Tran Quang;Tien, Nguyen Thanh;Seol, Young-Gug;Lee, Nae-Eung
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.491-491
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    • 2011
  • Transparent and flexible electronic devices that are light-weight, unbreakable, low power consumption, optically transparent, and mechanical flexible possibly have great potential in new applications of digital gadgets. Potential applications include transparent displays, heads-up display, sensor, and artificial skin. Recent reports on transparent and flexible field-effect transistors (tf-FETs) have focused on improving mechanical properties, optical transmittance, and performances. Most of tf-FET devices were fabricated with transparent oxide semiconductors which mechanical flexibility is limited. And, there have been no reports of transparent and flexible all-organic tf-FETs fabricated with organic semiconductor channel, gate dielectric, gate electrode, source/drain electrode, and encapsulation for sensor applications. We present the first demonstration of transparent, flexible all-organic sensor based on multifunctional organic FETs with organic semiconductor channel, gate dielectric, and electrodes having a capability of sensing infrared (IR) radiation and mechanical strain. The key component of our device design is to integrate the poly(vinylidene fluoride-triflouroethylene) (P(VDF-TrFE) co-polymer directly into transparent and flexible OFETs as a multi-functional dielectric layer, which has both piezoelectric and pyroelectric properties. The P(VDF-TrFE) co-polumer gate dielectric has a high sensitivity to the wavelength regime over 800 nm. In particular, wavelength variations of P(VDF-TrFE) molecules coincide with wavelength range of IR radiation from human body (7000 nm ~14000 nm) so that the devices are highly sensitive with IR radiation of human body. Devices were examined by measuring IR light response at different powers. After that, we continued to measure IR response under various bending radius. AC (alternating current) gate biasing method was used to separate the response of direct pyroelectric gate dielectric and other electrical parameters such as mobility, capacitance, and contact resistance. Experiment results demonstrate that the tf-OTFT with high sensitivity to IR radiation can be applied for IR sensors.

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3차원 수치모의를 이용한 배수갑문의 방류능력 개선효과 분석 (Analysis of the Discharge Capacity Improvement of a Lock Gate by Using 3-Dimensional Numerical Simulation)

  • 김남일;김대근;이길성;김달선
    • 한국수자원학회논문집
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    • 제38권3호
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    • pp.189-198
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    • 2005
  • 본 연구에서는 조력발전소 배수갑문의 형상과 배치에 따른 방류능력을 해석하는데 3차원 수치모의가 효과적으로 이용될 수 있음을 보였다. 3차원 수치모형은 RANS를 지배방정식으로 하는 FLOW-3D 모형을 이용하였다. 본 연구결과 배수갑문의 방류능력은 물받이길이와 도류벽의 접근각도에 큰 영향을 받는 것으로 나타났다. 그리고 이의 개선 여부에 따라 $10\%$ 이상의 방류량 차이가 발생하였다. 또한 방류량은 배수문과 수차구조물을 연결하는 구조물의 형상과 물받이 끝 사면경사의 영향을 받는 것으로 나타났다. 본 연구에서는 배수갑문의 설계시 방류능력 개선을 위해서는 수리학적 검토가 필요하며, 수치모형실험이 수리모형실험과 더불어 유용한 해석도구로 이용될 수 있음을 보였다.