• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.65-66
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• 2006

AIGaN/GaN 고전자 이동도 트랜지스터 (High Electron Mobility Transistors, HEMTs)는 와이드 밴드-갭과 높은 항복 전계 및 우수한 채널 특성으로 인해 마이크로파 응용분야와 전력용 반도체에서 각광받고 있다. 최근, 전력 응용분야에서 요구되는 높은 항복 전압과 출력, 우수한 주파수 특성을 획득하기 인해 이중 게이트 AIGaN/GaN HEHTs에 관한 연구가 발표되고 있다. 본 논문에서는 AIGaN/GaN HEMTs에 이중 게이트를 적용하여, 두 개의 게이트와 드레인, 소스의 누설 전류를 각각 측정하여 이중 게이트 AIGaN/GaN HEMTS의 누설 전류 메커니즘을 분석하였다. 또한 제안된 소자의 $SiO_2$ 패시베이션 전 후의 누설 전류 특성을 비교하였다. $SiO_2 $ 패시베이션되지 않은 소자의 누설 전류는 드레인, 소스와 추가 게이트로부터 주 게이트로 흐른 반면, 패시베이션 된 소자 누설 전류는 드레인으로부터 주 게이트 방향의 누설 전류만 존재하였다. $SiO_2$ 패시베이션 된 소자의 누설 전류는 (87.31 nA ) 패시베이션 되지 않은 소자의 누설 전류 ( $8.54{\mu}A$ )에 비해 의게 감소하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.12
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• pp.1069-1077
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• 2011

In this paper, a design and fabrication of a miniaturized 2.5 GHz 8 W power amplifier using selectively anodized aluminum oxide(SAAO) substrate are presented. The process of SAAO substrate is recently proposed and patented by Wavenics Inc. which uses aluminum as wafer. The selected active device is a commercially available GaN HEMT chip of TriQuint company, which is recently released. The optimum impedances for power amplifier design were extracted using the custom tuning jig composed of tunable passive components. The class-F power amplifier are designed based on EM co-simulation of impedance matching circuit. The matching circuit is realized in SAAO substrate. For integration and matching in the small package module, spiral inductors and single layer capacitors are used. The fabricated power amplifier with $4.4{\times}4.4\;mm^2$ shows the efficiency above 40 % and harmonic suppression above 30 dBc for the second(2nd) and the third(3rd) harmonic at the output power of 8 W.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.10
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• pp.892-899
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• 2016

In this paper, an X-band 50 W internally matched power amplifier is designed and fabricated using an $80{\times}150{\mu}m$ GaN HEMT that is developed by the $0.25{\mu}m$ GaN HEMT process of ETRI. The optimum source and load impedances are experimentally extracted from the loadpull measurement using impedance-transform-prematching circuits, and the transistor performance is predicted. The power performance of the internally matched power amplifier, whose matching circuits are fabricated on a substrate with ${\varepsilon}_r$ of 10.2, is measured under the pulsed mode of $100{\mu}s$ pulse period and 10 % duty cycle, and the best output power of 47.46 dBm(55.5 W) and the power-added efficiency of 46.6 % are obtained at 9.2 GHz. The output power of 47~47.46 dBm(50~55.7 W) is measured in 9.0~9.5 GHz, and the power-added efficiency is measured to be greater than 43 % in 9.0~9.3 GHz and above 36 % in 9.4~9.5 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.11
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• pp.1019-1022
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• 2016

In this paper, a 2~16 GHz GaN wideband power amplifier MMIC s designed and fabricated using the nonuniform power amplifier design technique that utilizes drain shunt capacitors to simultaneously provide each transistor with the optimum load impedance and phase balance between input and output transmission lines. The power amplifier MMIC chip that is fabricated using the $0.25{\mu}m$ GaN HEMT foundry process of Win Semiconductors occupies an area of $3.9mm{\times}3.1mm$ and shows a linear gain of larger than 12 dB and an input return loss of greater than 10 dB. Under a continuous-wave mode, it has a saturated output power of 36.2~38.5 dBm and a power-added efficiency of about 8~16 % in 2 to 16 GHz.

• Proceedings of the Korean Vacuum Society Conference
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• 2009.08a
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• pp.143-143
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• 2009

• Proceedings of the Korean Vacuum Society Conference
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• 2009.02a
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• pp.77-77
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• 2009

• Proceedings of the Korean Vacuum Society Conference
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• 2007.08a
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• pp.315-315
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• 2007

• Transactions on Electrical and Electronic Materials
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• v.14 no.1
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• pp.32-35
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• 2013

In this paper, a manufacturing process was developed for fabricating high-quality AlGaN/GaN high electron mobility transistors (HEMTs) on silicon carbide (SiC) substrates. Various conditions and processing methods regarding the ohmic contact and pre-metal-deposition $BCl_3$ etching processes were evaluated in terms of the device performance. In order to obtain a good ohmic contact performance, we tested a Ti/Al/Ta/Au ohmic contact metallization scheme under different rapid thermal annealing (RTA) temperature and time. A $BCl_3$-based reactive-ion etching (RIE) method was performed before the ohmic metallization, since this approach was shown to produce a better ohmic contact compared to the as-fabricated HEMTs. A HEMT with a 0.5 ${\mu}m$ gate length was fabricated using this novel manufacturing process, which exhibits a maximum drain current density of 720 mA/mm and a peak transconductance of 235 mS/mm. The X-band output power density was 6.4 W/mm with a 53% power added efficiency (PAE).

• ETRI Journal
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• v.39 no.5
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• pp.737-745
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• 2017

A 6-GHz-to-18-GHz monolithic nonuniform distributed power amplifier has been designed using the load modulation of increased series gate capacitance. This amplifier was implemented using a $0.25-{\mu}m$ AlGaN/GaN HEMT process on a SiC substrate. With the proposed load modulation, we enhanced the amplifier's simulated performance by 4.8 dB in output power, and by 13.1% in power-added efficiency (PAE) at the upper limit of the bandwidth, compared with an amplifier with uniform gate coupling capacitors. Under the pulse-mode condition of a $100-{\mu}s$ pulse period and a 10% duty cycle, the fabricated power amplifier showed a saturated output power of 39.5 dBm (9 W) to 40.4 dBm (11 W) with an associated PAE of 17% to 22%, and input/output return losses of more than 10 dB within 6 GHz to 18 GHz.

• Transactions on Electrical and Electronic Materials
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• v.18 no.3
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• pp.125-128
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• 2017

This study is on how ohmic area etching affects the buffer breakdown voltage of AlGaN/GaN HEMT. The surface morphology of the ohmic metal can be improved by whole etching on the ohmic area. The buffer breakdown voltages of the samples with whole etching on the ohmic area were improved by the suppression of the metal spikes formed under the ohmic contact regions during high-temperature annealing. The samples with selective etching on the ohmic area were investigated for comparison. In addition, the buffer leakage currents were measured on the different radii of the wafer, and the uniformity of the buffer leakage currents on the wafer were investigated by PL mapping measurement.