• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.10
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• pp.846-851
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• 2007

In this work, the etching characteristics of $Ge_2Sb_2Te_5(GST)$ thin films were investigated using an inductively coupled plasma (ICP) of $Cl_2/Ar$ gas mixture. To analyze the etching mechanism, an optical emission spectroscopy (OES) and surface analysis using X-ray photoelectron spectroscopy (XPS) were carried out. The etch rate of the GST films decreased with decreasing Ar fraction. At the same time, high selective etch rate over $SiO_2$ films was obtained and the selectivity over photoresist films decreased with increasing the he fraction. From XPS results, we found that Te halides were formed at the etching surface and Te halides limited the etch rate of the GST films.

• Journal of the Korean Vacuum Society
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• v.19 no.2
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• pp.155-160
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• 2010

The effect of process temperature of a final annealing step in the fabrication of phase change memory (PCM) devices was investigated. Discrete PCM devices employing $Ge_2Sb_2Te_5$ (GST) films as an active element were made in a pore-style configuration, and they were annealed at various temperatures ranging from 160 to $300^{\circ}C$. The behaviors of cell resistance change from SET resistance to RESET resistance were totally different according to the annealing temperatures. There was a critical annealing temperature for the fabrication of normal PCM devices and abnormal operations were observed in some devices annealed at temperatures lower or higher than the critical temperature. Those influences of annealing temperature seem closely related to the thermal stability of a top electrode/GST/heating layer multilayer structure in the PCM devices.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.09a
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• pp.73-77
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• 2005

고분해능 투과전자현미경을 이용하여 PRAM소자의 상변화물질인 $Ge_{2}Sb_{2}Te_{5}(GST)$의 결정화에 관해 미세구조 분석을 수행하였다. 결정성을 측정하는 일반적인 방법인 XRD법에 비해 고분해능 투과전자현미경을 이용한 미세구조 분석은 XRD에서 분석할 수 없는 결정화 초기 양상을 분석할 수 있을 뿐만 아니라, 소자내부의 국부적인 영역과 같이 특정한 영역에서의 결정구조 및 원자배열에 관한 분석이 가능하였다. 이를 통해 GST박막의 전기적 특성이 결정립 크기에 직접적으로 연관성이 있음을 밝혀내었다. GST의 결정구조 및 원자배열에 관해서는, 제한시야전자회절 기법을 통해 준안정상에서의 GST는 FCC 구조를 가지고 안정상의 GST는 hexagonal 구조를 가짐을 보여주었으며, 고분해능 이미지 관찰을 통해 원자단위로 GST의 결정성을 규명하였다.

• Applied Science and Convergence Technology
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• v.23 no.1
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• pp.34-39
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• 2014

The programmable switches which control the delivery of electrical signals in programmable logic devices are fabricated using memory technology. Although phase change memory (PCM) technology is one of the most promising candidates for the manufacturing of the programmable switches, the threshold switching material should be added to a PCM cell for realization of the programmable switches based on PCM technology. In this work, we report the impurity-doped $Ge_2Sb_2Te_5$ (GST) chalcogenide alloy exhibiting threshold switching property. Unlike the GST thin film, the doped GST thin film prepared by the incorporation of In and P into GST is not crystallized even at the postannealing temperature higher than $200^{\circ}C$. This specific crystallization behavior in the doped GST thin film is attributed to the stabilization of the amorphous phase of GST by In and P doping.

• Transactions on Electrical and Electronic Materials
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• v.15 no.1
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• pp.37-40
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• 2014

A novel memory is reported, in which $Ge_2Sb_2Te_5$ (GST) has been used as a floating gate. The threshold voltage was shifted due to the phase transition of the GST layer, and the hysteretic behavior is opposite to that arising from charge trapping. Finite Element Modeling (FEM) was adapted, and a new simulation program was developed using c-interpreter, in order to analyze the small shift of threshold voltage. The results show that GST undergoes a partial phase transformation during the process of RESET or SET operation. A large $V_{TH}$ shift was observed when the thickness of the GST layer was scaled down from 50 nm to 25 nm. The novel 1 transistor PCM (1TPCM) can achieve a faster write time, maintaining a smaller cell size.

• Proceedings of the Optical Society of Korea Conference
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• 2001.02a
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• pp.260-261
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• 2001

일반적으로 상업화된 타원계는 회전 검광자(회전 편광자), 혹은 위상변조방식이 주를 이루고 있다. 회전 검광자나 위상변조방식의 타원계는 모터를 회전시키거나 위상을 변조시키는 방법에 의존하므로 하나의 타원상수쌍 ( ,Ψ)를 얻는데 수십 $\mu\textrm{s}$ - 수십 ms의 측정시간을 필요로 한다. 그러나, 예를 들어 상변화형 광기록매체인 Ge$_2$Sb$_2$Te$_{5}$(GST)와 같이 수십 ns 시간간격으로 비정질상과 결정상이 변화하면서 정보 데이터를 저장하거나 소거하게 되는 경우 비정질상에서 결정상으로 바뀌는 과정의 결정화과정을 측정하고 분석하기 위해서는 수 ns로 측정할 수 있는 장비가 필요하다. (중략)

• Korean Chemical Engineering Research
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• v.47 no.6
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• pp.715-719
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• 2009

The phase change electrode board for the bio-information detection through electrical property response of phase change material was developed in this study. We manufactured the electrode board using Aluminum first that is widely used in conventional semiconductor device process. Without further treatment, these aluminum electrodes tend to contain voids in PETEOS(plasma enhanced tetraethyoxysilane) material that are easily detected by cross-sectional SEM(Scanning Electron Microscope). The voids can be easily attacked and transformed into holes in between PETEOS and electrodes after etch back and washing process. In order to resolve this issue of Al electrode board, we developed a electrode board manufacturing method using low resistivity TiN, which has advantages in terms of the step-coverage of phase change($Ge_2Sb_2Te_5$, GST) thin film as well as thermodynamic stability, without etch back and washing process. This TiN material serves as the top and bottom electrode in PRAM(Phase-change Random Access Memory). The good connection between the TiN electrode and GST thin film was confirmed by observing the cross-section of TiN electrode board using SEM. The resistances of amorphous and crystalline GST thin film on TiN electrodes were also measured, and 1000 times difference between the amorphous and crystalline resistance of GST thin film was obtained, which is well enough for the signal detection.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.132-132
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• 2011

For the programming volume of PRAM, Ge2Sb2Te5(GST) thin films have been dominantly used and prepared by physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD). Among these methods, ALD is particularly considered as the most promising technique for the integration of PRAM because the ALD offers a superior conformality to PVD and CVD methods and a digital thickness control precisely to the atomic level since the film is deposited one atomic layer at a time. Meanwhile, although the IST has been already known as an optical data storage material, recently, it is known that the IST benefits multistate switching behavior, meaning that the IST-PRAM can be used for mutli-level coding, which is quite different and unique performance compared with the GST-PRAM. Therefore, it is necessary to investigate a possibility of the IST materials for the application of PRAM. So far there are many attempts to deposit the IST with MOCVD and PVD. However, it has not been reported that the IST can be deposited with the ALD method since the ALD reaction mechanism of metal organic precursors and the deposition parameters related with the ALD window are rarely known. Therefore, the main aim of this work is to demonstrate the ALD process for IST films with various precursors and the conformal filling of a nano size programming volume structure with the ALD?IST film for the integration. InSbTe (IST) thin films were deposited by ALD method with different precursors and deposition parameters and demonstrated conformal filling of the nano size programmable volume of cell structure for the integration of phase change random access memory (PRAM). The deposition rate and incubation time are 1.98 A/cycle and 25 cycle, respectively. The complete filling of nano size volume will be useful to fabricate the bottom contact type PRAM.

• Korean Journal of Optics and Photonics
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• v.18 no.5
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• pp.351-361
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• 2007

The samples composed of a GST thin film and the protective layers of $ZnS-SiO_2$ or $Al_2O_3$ coated on c-Si substrate were prepared by using the magnetron sputtering method. Samples of three different structures were prepared, that is, i) the GST single film on c-Si substrate, ii) the GST film sandwiched by the protective $ZnS-SiO_2$ layers on c-Si substrate, and iii) the GST film sandwiched by $Al_2O_3$ protective layers on c-Si substrate. The ellipsometric constants in the temperature range from room temperature to $700^{\circ}C$ were obtained by using the in-situ ellipsometer equipped with a conventional heating chamber. The measured ellipsometric constants show strong variations versus temperature. The variation of ellipsometric constants at the temperature region higher than $300^{\circ}C$ shows different behaviors as the ambient medium is changed from in air to in vacuum or the protective layers are changed from $ZnS-SiO_2$ to $Al_2O_3$. Since the long heating time of 1-2 hours is believed to be the origin of the high temperature variation of ellipsometric constants upon the heating environment and the protective layers, a PRAM (Phase-Change Random Access Memory) recorder is introduced to reduce the heating time drastically. By using the PRAM recorder, the GST samples are heated up to $700^{\circ}C$ decomposed preventing its partial evaporation or chemical reactions with adjacent protective layers. The surface image obtained by SEM and the surface micro-roughness verified by AFM also confirmed that samples prepared by the PRAM recorder have smoother surface than the samples prepared by using the conventional heater.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.128-133
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• 2008

Phase-change random access memory (PRAM) chip cell phase of amorphous state is rapidly changed to crystal state above 160 Celsius degree within several seconds during Infrared (IR) reflow. Thus, on-board programming method is considered for PRAM chip programming. We demonstrated the functional 512Mb PRAM with 90nm technology using several novel core circuits, such as metal-2 line based global row decoding scheme, PN-diode cells based BL discharge (BLDIS) scheme, and PMOS switch based column decoding scheme. The reverse-state standby current of each PRAM cell is near 10 pA range. The total leak current of 512Mb PRAM chip in standby mode on discharging state can be more than 5 mA. Thus in the proposed BLDIS control, all bitlines (BLs) are in floating state in standby mode, then in active mode, the activated BLs are discharged to low level in the early timing of the active period by the short pulse BLDIS control timing operation. In the conventional sense amplifier, the simultaneous switching activation timing operation invokes the large coupling noise between the VSAREF node and the inner amplification nodes of the sense amplifiers. The coupling noise at VSAREF degrades the sensing voltage margin of the conventional sense amplifier. The merit of the proposed sense amplifier is almost removing the coupling noise at VSAREF from sharing with other sense amplifiers.