• The Journal of the Korea Contents Association
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• v.15 no.9
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• pp.21-28
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• 2015

In the semi-conductor process, a simulation process is performed to detect defects by analyzing the behavior of the impurity through the physical quantity calculation of the inner element. In order to perform the simulation, Finite-Difference Time-Domain(FDTD) algorithm is used. The improvement of semiconductor which is composed of nanoscale elements, the size of simulation is getting bigger. Problems that a processor such as CPU or GPU cannot perform the simulation due to the massive size of matrix or a computer consist of multiple processors cannot handle a massive FDTD may come up. For those problems, studies are performed with parallel/distributed computing. However, in the past, only single type of processor was used. In GPU's case, it performs fast, but at the same time, it has limited memory. On the other hand, in CPU, it performs slower than that of GPU. To solve the problem, we implemented a computing model that can handle any FDTD simulation regardless of size on the cluster which consist of heterogeneous processors. We tested the simulation on processors using MPI libraries which is based on 'point to point' communication and verified that it operates correctly regardless of the number of node and type. Also, we analyzed the performance by measuring the total execution time and specific time for the simulation on each test.

• Journal of the Korea Computer Graphics Society
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• v.26 no.4
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• pp.17-26
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• 2020

We present a real-time GPU(Graphic Processing Unit) marching tetrahedra technique that extracts isosurfaces in the indexed mesh format from BCC(Body Centered Cubic) volume datasets. Compared to classical marching tetrahedra, our method shows better performance with little memory overhead. Our technique is composed of five stages. In the first stage, which needs to be done only once, we build min/max blocks that is to be used for empty space skipping to boost the performance. Next, we extract active blocks that contain the current isovalue. In the next two stages, we extract the edges and cells that contain the isosurface and then the final triangular mesh is generated in the last stage. When applied 512³ or higher resolution volume dataset, our technique shows up to 5 times speed improvement compared to the classical marching tetrahedra algorithm.

• Journal of Korea Game Society
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• v.14 no.4
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• pp.45-52
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• 2014

We cannot load the entire data for high-resolution terrain model to the GPU memory since its size is too big. Out-of-core approaches are commonly used to solve the problem. However, due to limited bandwidth of the secondary storage, it is difficult to render the terrain in real-time. A method that compresses the DEM data with wavelet transform on GPU, and renders the decoded data is suggested. However, it is inefficient since it has to sample the values from textures, convert them to vertices, and generate a mesh periodically. We propose a method to store the approximation coefficients of wavelet compression as vertex attributes and render the terrain by decoding the data on geometric shader. It can reduce the amount of transferring terrain texture since approximation coefficients are given as an attribute of the vertex. Also, it generate meshes without additional upload of terrain texture.

• KIPS Transactions on Computer and Communication Systems
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• v.12 no.2
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• pp.69-76
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• 2023

Hundreds of thousands of passwords are lost or forgotten every year, making the necessary information unavailable to legitimate owners or authorized law enforcement personnel. In order to recover such a password, a tool for password cracking is required. Using GPUs instead of CPUs for password cracking can quickly process the large amount of computation required during the recovery process. This paper optimizes on GPUs using CUDA, with a focus on decryption of the currently most popular PDF 1.4-1.6 version. Techniques such as eliminating unnecessary operations of the MD5 algorithm, implementing 32-bit word integration of the RC4 algorithm, and using shared memory were used. In addition, autotune techniques were used to search for the number of blocks and threads that affect performance improvement. As a result, we showed throughput of 31,460 kp/s (kilo passwords per second) and 66,351 kp/s at block size 65,536, thread size 96 in RTX 3060, RTX 3090 environments, and improved throughput by 22.5% and 15.2%, respectively, compared to the cracking tool hashcat that achieves the highest throughput.

• Korean Journal of Computational Design and Engineering
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• v.19 no.3
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• pp.294-304
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• 2014

This paper presents a real-time rendering algorithm of large-scale geometric data using GLSL (OpenGL shading language). It details the VAO (vertex array object) and VBO(vertex buffer object) to be used for up-loading the large-scale point clouds and polygon meshes to a graphic video memory, and describes the shader program composed by a vertex shader and a fragment shader, which manipulates those large-scale data to be rendered by GPU. In addition, we explain the global rendering procedure that creates and runs the shader program with the VAO and VBO. Finally, a rendering performance will be measured with application examples, from which it will be demonstrated that the proposed algorithm enables a real-time rendering of large amount of geometric data, almost impossible to carry out by previous techniques.

• Journal of the Korea Computer Graphics Society
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• v.21 no.5
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• pp.37-44
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• 2015

This paper presents a novel 3D model representation, called hybrid model representation, to overcome existing 3D volume-based indoor scene reconstruction mechanism. In indoor 3D scene reconstruction, volume-based model representation can reconstruct detailed 3D model for the narrow scene. However it cannot reconstruct large-scale indoor scene due to its memory consumption. This paper presents a memory efficient plane-hash model representation to enlarge the scalability of the indoor scene reconstruction. Also, the proposed method uses plane-hash model representation to reconstruct large, structural planar objects, and at the same time it uses volume-based model representation to recover small detailed region. Proposed method can be implemented in GPU to accelerate the computation and reconstruct the indoor scene in real-time.

• Journal of KIISE
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• v.43 no.1
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• pp.61-70
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• 2016

In recent years, there has been a need for techniques for large-scale ontology inference in order to infer new knowledge from existing knowledge at a high speed, and for a diversity of semantic services. With the recent advances in distributed computing, developments of ontology inference engines have mostly been studied based on Hadoop or Spark frameworks on large clusters. Parallel programming techniques using GPGPU, which utilizes many cores when compared with CPU, is also used for ontology inference. In this paper, by combining the advantages of both techniques, we propose a new method for reasoning large RDFS ontology data using a Spark in-memory framework and inferencing distributed data at a high speed using GPGPU. Using GPGPU, ontology reasoning over high-capacity data can be performed as a low cost with higher efficiency over conventional inference methods. In addition, we show that GPGPU can reduce the data workload on each node through the Spark cluster. In order to evaluate our approach, we used LUBM ranging from 10 to 120. Our experimental results showed that our proposed reasoning engine performs 7 times faster than a conventional approach which uses a Spark in-memory inference engine.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.1
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• pp.100-106
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• 2017

In this paper, we propose a parallel optimization method of Aho-Corasick (AC) algorithm and Parallel Failureless Aho-Corasick (PFAC) algorithm using Open Computing Language (OpenCL) on Field Programmable Gate Array (FPGA). The low throughput of string matching engine causes the performance degradation of network process. Recently, many researchers have studied the string matching engine using parallel computing. FPGA's vendors offer a parallel computing platform using OpenCL. In this paper, we apply the AC and PFAC algorithm on DE1-SoC board with Cyclone V FPGA, where the optimization that considers FPGA architecture is performed. Experiments are performed considering global id, local id, local memory, and loop unrolling optimizations using PFAC algorithm. The performance improvement using loop unrolling is 129 times greater than AC algorithm that not adopt loop unrolling. The performance improvements using loop unrolling are 1.1, 0.2, and 1.5 times greater than those using global id, local id, and local memory optimizations mentioned above.

• Journal of the Korea Computer Graphics Society
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• v.20 no.4
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• pp.1-7
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• 2014

The volume rendering has become an important technique in many applications along with hardware development. Understanding and perception of volume visualization benefit from visual cues which are available from shading. Better visual cues can be obtained from global illumination models but it's huge amount of computation and extra GPU memory need cause a lack of interactivity. In this paper, in order to improve visual cues on volume rendering, we propose an image space occlusion shading model which requires no additional resources.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.2
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• pp.460-470
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• 2017

We address how to handle big data mining effectively using the intelligent SSD (iSSD). ISSD is a storage device equipped with computing power inside SSD for reducing the transferring cost and for processing data nearby SSD where the data is stored. We first introduce the structural characteristics of iSSD for efficient data processing. Then, we present how to process data mining algorithms by using iSSD. Finally, we discuss how to improve the performance of data mining algorithms significantly by exploiting heterogeneous computing environment where host CPUs and GPU coexist for maximizing the performance.