• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.15-26
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• 2005

In this paper, we propose an efficient $GF(2^m)$ multi-segment multiplier architecture and study its application to elliptic curve cryptography processors. The multi-segment based ECC datapath has a very small combinational multiplier to compute partial products, most of its internal data buses are word-sized, and it has only a single m bit multiplexer and a single m bit register. Hence, the resource requirements of the proposed ECC datapath can be minimized as the segment number increases and word-size is decreased. Hence, as compared to the ECC processor based on digit-serial multiplication, the proposed ECC datapath is more efficient in resource usage. The resource requirement of ECC Processor implementation depends not only on the number of basic hardware components but also on the complexity of interconnection among them. To show the realistic area efficiency of proposed ECC processors, we implemented both the ECC processors based on the proposed multi-segment multiplication and digit serial multiplication and compared their FPGA resource usages. The experimental results show that the Proposed multi-segment multiplication method allows to implement ECC coprocessors, requiring about half of FPGA resources as compared to digit serial multiplication.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.6
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• pp.1083-1091
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• 2017

This paper describes a design of cryptographic processor supporting 224-bit elliptic curves over prime field defined by NIST. Scalar point multiplication that is a core arithmetic function in elliptic curve cryptography(ECC) was implemented by adopting the modified Montgomery ladder algorithm. In order to eliminate division operations that have high computational complexity, projective coordinate was used to implement point addition and point doubling operations, which uses addition, subtraction, multiplication and squaring operations over GF(p). The final result of the scalar point multiplication is converted to affine coordinate and the inverse operation is implemented using Fermat's little theorem. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 2.7-Kbit RAM and 27,739 gate equivalents (GEs), and the estimated maximum clock frequency is 71 MHz. One scalar point multiplication takes 1,326,985 clock cycles resulting in the computation time of 18.7 msec at the maximum clock frequency.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.10
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• pp.507-511
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• 2005

We have derived the linear complexity of a binary sequence generated by a Feedback with Carry Shift Regiater(FCSR) under the following condition: q is a power of a prime such that $q=r^e,\;(e{\geq}2)$ and r=2p+1, where both r and p are 2-prime. Also, a summation generator creates sequence from addition with carry of LFSR(Linear Feedback Shift Register) sequences. Similarly, it is possible to generate keystream by bitwise exclusive-oring on two FCSR sequences. In this paper, we described the cryptographic properties of a sequence generated by the FCSRs in view of the linear complexity.

• Proceedings of the Korea Information Processing Society Conference
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• 2010.11a
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• pp.1760-1762
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• 2010

본 논문에서 3치가산기와 승산기(multiplier)는 전류모드 CMOS에 의해서 구현된다. 첫째, 3치 T-gate를 집적회로 설계의 유효 가용성을 갖고 있는 전류모드 CMOS를 이용하여 구현한다. 둘째, 3치 T-gates를 이용해 회로가 유한체 GF (3)에 대하여 2변수 3치 가산표 (2-variable ternary addition table) 및 구구표 (multiplication table)가 실현되도록 구현한다. 마지막으로, 이러한 동작 회로들은 1.5 CMOS 표준 기술과 $15{\mu}A$ 단위전류(unit current) 및 3.3V 소스 전압 (VDD voltage)에 의해 활성화 된다. 활성화 결과는 만족할 만한 전류 특성을 나타냈다. 전류 모드 CMOS에 의하여 실행되는 3치가산기 및 승산기는 단순하며 와이어 라우팅(wire routing)에 대하여 정규적이고, 또한 셀 배열 (cell array)과 함께 모듈성 (modularity)의 특성을 갖고 있다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.13 no.5
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• pp.179-187
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• 2003

Recently efficient implementation of finite field operation has received a lot of attention. Among the GF($2^m$) arithmetic operations, multiplication process is the most basic and a critical operation that determines speed-up hardware. We propose a hardware architecture using Mastrovito method to reduce processing time. Existing Mastrovito multipliers using the special generating trinomial p($\chi$)=$x^m$+$x^n$+1 require $m^2$-1 XOR gates and $m^2$ AND gates. The proposed multiplier needs $m^2$ AND gates and $m^2$＋($n^2$-3n)/2 XOR gates that depend on the intermediate term xn. Time complexity of existing multipliers is $T_A$+( (m-2)/(m-n) +1+ log$_2$(m) ) $T_X$ and that of proposed method is $T_X$＋(1＋ log$_2$(m-1)＋ n/2 ) )$T_X$. The proposed architecture is efficient for the extension degree m suggested as standards: SEC2, ANSI X9.63. In average, XOR space complexity is increased to 1.18% but time complexity is reduced 9.036%.

• Korean Journal of Veterinary Research
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• v.9 no.1
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• pp.23-62
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• 1969

Throughout the studies the following experimental results were obtained and are summarized: 1. Multiplication of agents in primary cell cultures of both GF classical and CR-64 acute strain of Marek's disease infected chicken kidneys was accompanied by the formation of distinct transformed cell foci. This characteristic nature of cell transformation was passaged regularly by addition of dispersed cell from infected cultures to normal chicken kidney cell cultures, and also transferred was the nature of cell transformation to normal chick-embryo liver and neuroglial cell cultures. No cytopathic changes were noticed in inoculated chick-embryo fibroblast cultures. 2. The same cytopathic effects were noticed in normal kidney cell monolayers after the inoculation of whole blood and huffy coat cells derived from both forms of Marek's disease infected chickens. In these cases, however, the number of transformed cell foci appearing was far less than that of uninoculated monolayers prepared directly from the kidneys of Marek's disease infected chickens. 3. The change in cell culture IS regarded as a specific cell transformation focus induced by an oncogenic virus rather than it plaque in slowly progressing cytopathic effect by non-oncogenic viruses, and it is quite similar to RSV focus in chick-embryo fibroblasts in many respects. 4. The infective agent (cell transformable) were extremely cell-associated and could not be separated in an infective state from cells under the experimental conditions. 5. The focus assay of these agents was valid as shown by the high degree of linear correlation (r=0.97 and 0.99) between the relative infected cell concentration (in inoculum) and the transformed cell foci counted. 6. No differences were observed between the GF classical strain and the CR-64 acute strain of Marek's disease as far as cell culture behavior. 7. Characterization of the isolates by physical and chemical treatments, development of internuclear inclusions in Infected cells, and nucleic acid typing by differential stainings and cytochemical treatments indicated that the natures of these cell transformation agents closely resemble to those described fer the group B herpes viruses. 8. Susceptible chicks inoculated with infected kidney tissue culture cells developed specific lesions of Marek's disease, and in a case of prolonged observation after inoculation (5 weeks) the birds developed clinical symptoms and gross lesions of Marek's disease. Kidney cell cultures prepared from those inoculated birds and sacrificed showed a superior recovery of cell transformation property by formation of distinct foci. 9. Electron microscopic study of infected kidney culture cells (GF agent) by negative staining technique revealed virus particles furnishing the properties of herpes viruses. The particle was measured about $100m{\mu}$ and, so far, no herpes virus envelop has been seen from these preparations. 10. No relationship of both isolates to avian leukosis/sarcoma group viruses and PPLO was observed.