• Journal of the Korean Society for Precision Engineering
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• v.12 no.2
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• pp.79-86
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• 1995

Frequency response method is used to design hydraulic servo systems and improve its performance. In this study a method is proposed to get simply the frequency response of the electro-hydraulic servo system which use PWM controlled high-speed on-off valves. Firstly, the describing function of the PWM element is derived and tested. It is found that the character- istic of PWM element could be approximated to a saturation characteristic in the range of allowable frequency. And the dynamic characteristic of the valve-cylinder system could be negligible. The working characteristic of high-speed on-off valve is considered as time delay. So simulation is performed in the basis of the reconstructed block diagram. And this method is verified by experiments.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.4
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• pp.173-179
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• 2017

Autobike is insufficient of car navigation informations and high of accident dangerousness comparing to car. So if a system providing autobike driver's driving information and e-call function is developed using smart helmet consisting of collision perception sensor, rear camera, bluetooth communication module, MCU and HUD, It is very useful and can decrease of person's damage and handle expeditious traffic accident during autobike accident. In this paper, when this, "Providing system of autobike driver's information and e-call function", software is developed, a proper analysis and design method for practical affairs try to be presented due to showing software development analysis method, architecture of hardware block-diagram, flowchart and UI design.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2001.04a
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• pp.171-176
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• 2001

This paper describes the methodology of an IEC 1131-3-based control logic generator for the control system design and converting algorithm between programmable languages. The proposed control logic generator is generated based on the software model and common element with data type, variables, POUs(program organization unit) and execution control unit commonly used within programmable languages of IEC 1131-3 Standard. The generation method of object file was proposed on five programmable language based on IECI 131-3. The generation method of object file is represented as following; 1) the generation method using conversion algorithm from LD to IL with FBD(function block diagram), 2) the generation method using C code generation algorithm from SFC using the SFC execution sequence with FBD and ST(structured text). The proposed control logic generator was implemented by Visual C++ and MFC on MS-windows NT 4.0

• Proceedings of the KIEE Conference
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• 1996.07b
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• pp.1263-1265
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• 1996

IEC1131-3 Specification of Programming Controller is established in 1994 and consists of 3 graphical languages and 2 textual languages. It is used in PLC and small scale controller because of its uniformity and extensibility. This paper describes Soft Logic Designer which is a graphical and textual programming editor for IEC1131-3 programming languages. Soft Logic Designer is developed with Object Orient Language, C++ under Microsoft Windows 95. It has two graphic editors for Sequential Function Chart and Function Block Diagram and one textual editor for Structured Text. Users can efficiently write high-level programs with mouse and menu buttons.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2004.05a
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• pp.96-100
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• 2004

In the ship building industry various problems of erection is counterfeited due to formation of bottle necks in the block erection flow pattern This kind of problems cause accumulated problems in real-time erection right on the floor, When such a problem is approached, a support data of the entire erection sequence should be available, Here planning is done by reasoning about the future events in order to verify the existence of a reasonable series of actions to accomplish a goal. This technique helps in achieving benefits like handling search complications, in resolving goal conflicts and anticipation of bottleneck formation well in advance to take necessary countermeasures and boosts the decision support system, The data is being evaluated and an anticipatory function is to be developed This function is quite relevant in day to day planning operation. The system updates database with rearrangement of off-critical blocks in the erection sequence diagram, As a result of such a system, planners can foresee months ahead and can effectively make decisions regarding the control of loads on the man, machine and work flow pattern, culminating to an efficient load management. Such a foreseeing concept helps us in eliminating backtracking related adjustment which is less efficient compared to the look-ahead concept. An attempt is made to develop a computer program to update the database of block arrangement pattern based on heuristic formulation.

• Journal of the Korea Society for Simulation
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• v.18 no.4
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• pp.67-79
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• 2009

Because a product in the car industry has a short life cycle in recent years, the process planning and the manufacturing lines have to be changed frequently. Most of time, repositioning an existing facility and modifying used control information are faster than making completely new process planning. However, control information and control code such as PLC code are difficult to understand. Hence, industries prefer writing a new control code instead of using the existing complex one. It shows the lack of information reusability in the existing process planning. As a result, to reduce this redundancy and lack of reusability, we propose a SOS-Net modeling method. SOS-Net is a standard methodology used to describe control information. It is based on the Device Structure which consists of sensor information derived from device hardware information. Thus, SOS-Net can describe a real control state for automated manufacturing systems. The SOS-Net model is easy to understand and can be converted into PLC Code easily. It also enables to modify control information, thus increases the reusability of the new process planning. Proposed model in this paper plays an intermediary role between the process planning and PLC code generation. It can reduce the process planning and implementation time as well as cost.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• v.2
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• pp.15-22
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• 2006

This paper presents a novel signal tracking algorithm for GNSS receivers using a MLE technique. In order to perform a robust signal tracking in severe signal environments, e.g., high dynamics for navigation vehicles or weak signals for indoor positioning, the MLE based signal tracking approach is adopted in the paper. With assuming white Gaussian additive noise, the cost function of MLE is expanded to the cost function of NLSE. Efficient and practical approach for Doppler frequency tracking by the MLE is derived based on the assumption of code-free signals, i.e., the cost function of the MLE for carrier Doppler tracking is used to derive a discriminator function to create error signals from incoming and reference signals. The use of the MLE method for carrier tracking makes it possible to generalize the MLE equation for arbitrary codes and modulation schemes. This is ideally suited for various GNSS signals with same structure of tracking module. This paper proposes two different types of MLE based tracking method, i.e., an iterative batch processing method and a non-iterative feed-forward processing method. The first method is derived without any limitation on time consumption, while the second method is proposed for a time limited case by using a 1st derivative of cost function, which is proportional to error signal from discriminators of conventional tracking methods. The second method can be implemented by a block diagram approach for tracking carrier phase, Doppler frequency and code phase with assuming no correlation of signal parameters. Finally, a state space form of FLL/PLL/DLL is adopted to the designed MLE based tracking algorithm for reducing noise on the estimated signal parameters.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.37 no.5
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• pp.45-53
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• 2000

This paper presents an analysis of the dynamical behavor in the chaotic neuron fabricated using 0.8${\mu}{\textrm}{m}$ single poly CMOS technology. An approximated empirical equation models for the sigmoid output function and chaos generative block of the chaotic neuron are extracted from the measurement data. Then the dynamical responses of the chaotic neuron such as biurcation diagram, frequency responses, Lyapunov exponent, and average firing rate are calculated with numerical analysis. In addition, we construct the chaotic neural networks which are composed of two chaotic neurons with four synapses and obtain bifurcation diagram according to synaptic weight variation. And results of experiments in the single chaotic neuron and chaotic neural networks by two neurons with the $\pm$2.5V power supply and sampling clock frequency of 10KHz are shown and compared with the simulated results.

• Journal of Applied Reliability
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• v.16 no.3
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• pp.180-191
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• 2016

Purpose: The purpose of this study was to develop the accelerated life test method for Constant Electrical Potential Electrolysis gas sensor (CEPE gas sensor). Methods: The parts and modules of CEPE gas sensor were analyzed by using Reliability Block Diagram (RBD). Failure Mode and Effect Analysis (FMEA) and Quality Function Deployment (QFD) methods were performed for each part to determine the most affecting stress factor in its life cycle. The long term testing was conducted at three different dry heat levels and the acceleration factor was developed by using Arrhenius relationship. Conclusion: The acceleration factor for CEPE gas sensor was developed by using FMEA, QFD, and statistical analysis for its failure data. Also qualification tests were designed to meet the target life.

• Journal of Power Electronics
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• v.7 no.1
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• pp.38-43
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• 2007

An External Electrode Fluorescent Lamp (EEFL) has longer lifespan, higher power efficiency and higher luminance than a Cold Cathode Fluorescent Lamp (CCFL). Moreover, it is easy to drive them in parallel. Therefore, the EEFL is expected to quickly replace the CCFL in LCD backlight systems. However, the EEFL has more complex characteristics than the CCFL with a resistive component, because it has both a resistive component by plasma and a capacitive component by external electrode. In this paper, values of resistance and capacitance are measured at several power levels and at several operating frequencies. They are expressed by a numeral formula based on a linear approximation that represents the equivalent resistance and capacitance as a function of power. Then we made block diagram of the equivalent circuit model using numerical expressions. Simulation waveforms and experimental results are presented to verify the feasibility of the equivalent model.