• Title/Summary/Keyword: Frequency synthesizer

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Design and Fabrication of a Ka-Band Planar Filter to Suppress Spurious of a Mixer (혼합기 불요파 제거를 위한 Ka 대역 평판형 여파기 설계 및 제작)

  • Lee, Man-Hee;Yang, Seong-Sik;Jeong, Hae-Chang;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.10
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    • pp.1104-1114
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    • 2008
  • In the output of a mixer, spurious appears with the desired signal, and a filter is necessary to suppress the spurious. In this paper, the planar filter for Ka-band frequency synthesizer was designed and fabricated. In this procedure, the frequency response becomes asymmetric because of discontinuities at the high frequency. Using this, we designed short-end PCLF by using a individual resonator tuning method. The fabricated 5th-order Ka-band pass filter is compared with the result of EM simulation through measurement. The performance agrees with the simulation. Finally spurious suppression was examined through the measurement of output spectrum of the mixer with the filter.

A Study on Design and Performance Evaluation of the Frequency Snthesizer Using the DDS in the Transmitter of the FFH/BFSK System (FFH/BFSK 시스템 송신부에서 DDS를 이용한 주파수합성기 설계 및 성능평가에 관한 연구)

  • 이두석;유형렬;정지원;조형래;김기문
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1999.11a
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    • pp.161-166
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    • 1999
  • The global trends of mobile communication system is moving toward digitizing, high-speed and large-capacity. Also, to utilize the limited frequency-resource efficiently, spread spectrum system is a mainstream. In this study we are concerning with the fast frequency-hopping system. Instead of the PLL with many problems such as phase-noise, we used the DDS is popular in these days minimizes the disadvantage of PLL. In the case the FFH system is designed using the PLL, it is difficult to be satisfied of the design conditions such as RF badwidth and the settling time of PLL, and it has limitation because of complex circuit by using the balanced modulator. In this study, we evaluated the performance in order to design the FFH system using the DDS. The system that has the improvement of error rate, 1Mhps hopping rate and 5MHz RF bandwidth is designed and evaluated.

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A Study on the Phoneme Based Analysis of Korean Initial Plosives Using Statistical Method and Perception Tests (통계적 방법과 인지실험을 통한 한국어 초성파열음의 음소단위 분석에 관한 연구)

  • Jo Cheol-Woo;Lee Woo-Sun;Lee Cyu-Ho;Kim Jong-Ahn;Lim Gwang-Il;Lee Tae-Won
    • The Journal of the Acoustical Society of Korea
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    • v.8 no.5
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    • pp.78-85
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    • 1989
  • This paper describes a statistical methods and perception test for extracting the parameters to be used for the synthesis-by-rule of Korean plosives. Formant synthesizer is chosen for the synthesis of the phonemes. Speech materials for the analysis consists of 72 CV monosyllables from the single male speaker. The analysis is done mainly focused on the variation of parameters in time and frequency domain, then perception tests are executed to estimate the effects of variations of the formant transitions.

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A Study on Design and Implementation of Hangul-NAVTEX Simulator (한글 NAVTEX시뮬레이터 설계 및 구현에 관한 연구)

  • 이헌택;김기문
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.4
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    • pp.819-830
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    • 1999
  • NAVTEX system is an international automated direct-printing service, broadcast on 5181kHz and 490kHz, for the promulgation of navigational and meteorological warnings and urgent information to ships. With our government's adoption of the international convention for SAR(Search and Rescue) in 1993, various trials for the installation of NAVTEX system have been executed by the government committee, relating laboratory and experts. An important consideration of the installation for NAVTEX system is the availability that could broadcast messages written in korean letter. Also, the receiver which can process the signal demodulated from the two frequencies, 518kHz and 490kHz, should be developed and supplied in domestic. In this paper, the code table and algorithm for conversions between NAVTEX characters and Korean Letters are studied, and signal processing techniques of code conversion are developed. Circuit design and implementation of the NAVTEX simulator using the Direct Digital Synthesizer are discussed, code conversion algorithm and signal processing technique of the NAVTEX transmission are programmed in its circuits. For evaluating the its functional characteristics, receiving module which has I-Q channel structure is designed. From the measurements of simulator, the characteristics show the frequency stability of the $(\pm)2Hz$ and Spurious free dynamic range is -63dBc. And the simulator can generate simultaneously wanted signal and several interfere signals. So, its capability is valuable for designers of the transmitting system and NAVTEX receiver, for provider as testing facilities of the type approval.

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Design and Implementation of Down-Converter for WCDMA Digital Optic Repeater (WCDMA 디지털 광 중계기용 Down-Converter 설계 및 제작)

  • 김성수;강원구;장인봉;양승인
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.9
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    • pp.974-978
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    • 2003
  • The down-converter of the WCDMA Digital Optic Repeater is developed. Based on the system specifications, the structure of the down-converter is accomplished and its block diagram is drawn. The down-converter is implemented according to these block diagrams. Subsequently a low pass filter, an automatic level controlled attenuator, a frequency synthesizer and other components for the down-converter are designed and implemented, and a main board to integrate these modules is also manufactured. To reduce the noise floor of system and suppress the RF spurious noise, a PCB layout is performed carefully. For each module consisting of the down-converter and the entire system, the performance tests are accomplished to check the performance about the specifications.

The Performance Analysis of the DDFS to drive PLL (PLL을 구동하기 위한 DDFS의 성능분석)

  • 손종원;박창규;김수욱
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.8
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    • pp.1283-1291
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    • 2002
  • In this paper, the PLL driven by the DDFS is designed on the schematic using the Q-logic cell based library and is implemented using FPGA QL32 x16B. The measurement results of the frequency synthesizer switching speed were agreement with a register. The simulated results show that the clock delay was generated after eleven clock and if input is random, It has influence on output DA converter has to be very extensive. Therefore, the DDFS used noise shaper to drive PLL by regular interval for input state. Also the bandwidth of DA converter very extensive, the simulation shows that the variation of small input control word is better than the switching speed of PLL.

Waveform Generator for W-band Compact Radar (W-band 소형 레이다용 파형발생부)

  • Lee, Man-Hee;An, Se-Hwan;Kim, Young-Gon;Kim, Hong-Rak
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.5
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    • pp.97-102
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    • 2018
  • In this paper, W-band Waveform Generator for compact radar has been designed and fabricated. DDS (Direct Digital Synthesizer) is applied to generate CW (Continuous Wave) and FMCW (Frequency Modulation Continuous Wave) waveform at high speed. We designed two LO (Local Oscillator) paths for functions of distance delay and distance tracking tests at the prpposed system without extra test equipment. Two mode selections are provided by switch. It is observed that fabricated waveform generator performs -91 dBc/Hz phase noise at offset 1 kHz and -63.2 dBc spurious. Proposed W-band Waveform Generator is expected to apply for W-band compact radar transceiver module.

A Research of Power-Efficient Driving Scheme for Auto-Focus on Image Sensor Module (이미지 센서 모듈을 위한 자동-초점 기능의 전력-효율적인 구동 방법에 대한 연구)

  • Cha, Sang-Hyun;Park, Chan-Woo;Lee, Yuen-Joong;Hwang, Byoung-Won;Kwon, Oh-Jo;Park, Deuk-Hee;Kwon, Kyoung-Soo;Lee, Jae-Shin;Hwang, Shin-Hwan
    • Journal of Institute of Control, Robotics and Systems
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    • v.15 no.12
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    • pp.1197-1202
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    • 2009
  • We present a power-efficient driving scheme that consists of piezoelectric actuator and driver IC for AF (Auto-Focus) on ISM (Image Sensor Module). The piezoelectric actuator is more power-efficient than conventional voice coil motor actuator. And high power-efficiency driver IC is designed. So the proposed driving scheme using designed piezoelectric actuator and driver IC is more close to recent trend of green IT. The diver IC should guarantee fast and accurate performance. So, the optimum driving method and high accurate frequency synthesizer are proposed. The die area of designed driver IC is $2.0{\times}1.6mm^2$ and power consumption is 2.8mW.

Performance Analysis of Extended n-$\Delta$ Dely-Lock Loops (n-$\Delta$ Delay-Lock Loops의 성능 해석)

  • Ryu, Seung-Mun;Eun, Jung-Gwan;Kim, Jae-Gyun
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.18 no.1
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    • pp.16-24
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    • 1981
  • The delay-lock loop (DLL) is a statistically optimum device for tracking the de]ay difference between two correlated waveforms. In this paper an extended n - $\Delta$ (n=1,2,3‥‥) DLL is described, and its baseband performance including the frequency to lose lock is analyzed. The present DLL system employs a correlator and a pseudonoise sequence synthesizer that has been improved from the previously used ones The shape of the correlator characterigtic has the form of expanded S-curve. Despite of increase noise, this extended DLL has desirable characteristics in tracking range and initial synchronization time. Comparing a 3 - $\Delta$ DLL with a 1 - A DLL, the former Bives three times faster initial synchronization time with the serial synchronization method, and gives two times immunity against doppler shift.

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Design of the 10MHz and 10W Power Source for Short Distance Wireless Power Transmission (근거리 무선 전력 전송을 위한 평형 증폭기 구조의 10MHz 10W급 전력원 설계)

  • Park, Dong-Hoon;Kim, Gui-Sung;Lim, Eun-Cheon;Park, Hye-Mi;Lee, Moon-Que
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.3
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    • pp.437-441
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    • 2012
  • In this paper, we have designed and manufactured 10MHz power source for the application of short distance wireless power transmission. The designed power source consists of a DDS(direct digital synthesizer) signal generator, a buffer driver and a balanced power amplifier. Short range wireless power transmission is usually carried out by near-field inductive coupling between source and load. The distance variation between source and load gives rise to the change of load impedance of power amplifier, which has effect on the operation of power amplifier. To overcome this problem due to load variation of power amplifier, we have adopted the balanced power amplifier using the quadrature hybrid implemented by lumped capacitors and a mutually coupled coil. The experiment results show the above 40dBm output power, frequency range of 9 to 11MHz, and total DC power consumption of 36W.