• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.3
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• pp.34-42
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• 1993

An analytic approach to wide-band amplification using simplified equivalent MESFET modeling has enabled an ultrabroad-band flat-gain amplifier from DC to microwave. The developed lossy-match ultrabroad-band amplifier operates as a RC coupled circuit in the low-frequency range and lossless impedance matching circuit in the microwave frequency range with gain compensation circuits. The reduced gain caused by external resistors is compensated using 2-stage cascade amplification, and the gain of designed unit is 12.5.+-.1dB from the vicinity of DC to 7GAz. The experimental gain characteristics are good agreement with computer simulated results. The input and output VSWRs are measured under 2:1 over the operating frequency range, and the gain goes down over 15dBrange with various gate bias voltages.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.6
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• pp.473-478
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• 2021

This paper designed a wideband, high gain planar trapezoidal monopole antenna using backside frequency selective surface (FSS) according to the need for wideband and high gain antenna required in various fields such as rapidly increasing wireless communication, autonomous vehicles, 5G wireless communication and wideband applications. The proposed antenna uses a dual metallic to have a structural difference from the existing FSS. By solving the complexity of the design antenna using genetic algorithms (GA) and high frequency structural simulators (HFSS) simulations, the proposed antenna is not only produce a high efficiency but also presents a wide bandwidth of 3.52 to 5.92 GHz and a gain of 10.5 dBi over the entire bandwidth, with the highest gain of 11.8 dBi at 5.1 GHz. It has been confirmed that the gain increased 8.6 dBi as the 36% impedance bandwidth of 1.8 GHz compared to the existing antenna improved to the 50% impedance bandwidth of 2.4 GHz.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.354-355
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• 2018

Flywheel energy storage system (FESS) operates motor or generator by utilizing the stored kinetic energy in the rotating mass. Thus, the FESS can support the frequency control of the power system. However, the FESS is disabled when the rotor speed reaches to its minium value. Thus, the second frequency dip occurs in the power system. This paper proposes the frequency control scheme of FESS based on a variable gain depending on the rotor speed and frequency deviation. The proposed scheme prevents the second frequency dip because the variable gain decreases depending on the stored in the FESS. The performance of the proposed scheme is investigated for the IEEE 14-bus system.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1108-1110
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• 1995

This paper presents a balanced CMOS complementary folded cascode OP-AMP topology that achieves improved DC gain using the gain boosting technique, a high unity-gain frequency and improved slew rate using the CMOS complementary cascode structure and a high PSRR using the balanced output stage. Bode-plot measurements of a balanced CMOS complementary folded cascode OP-AMP show a DC gain of 80dB, a unity-gain frequency of 110MHz and a slew rate of $274V/{\mu}s$(1pF load). This balanced CMOS complementary folded cascode OP-AMP is well suited for high frequency analog signal processing applications.

• Journal of IKEEE
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• v.22 no.2
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• pp.408-412
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• 2018

In this paper, a 26GHz variable gain amplifier fabricated using a 40nm CMOS process is studied. In the case of an automobile radar using 79 GHz, it is advantageous in designing and driving to drive down to a low frequency band or to use a low frequency band before up conversion rather than designing and matching the entire circuit to 79 GHz in terms of frequency characteristics. In the case of a Phased Array System that uses time delay through TTD (True Time Delay) in practice, down conversion to a lower frequency is advantageous in realizing a real time delay and reducing errors. For a VGA (Variable Gain Amplifier) operating in the 26GHz frequency band that is 1/3 of the frequency of 79GHz, VDD : 1V, Bias 0.95V, S11 is designed to be <-9.8dB (Mea. High gain mode) and S22 < (Mea. high gain mode), Gain: 2.69dB (Mea. high gain mode), and P1dB: -15 dBm (Mea. high gain mode). In low gain mode, S11 is <-3.3dB (Mea. Low gain mode), S22 <-8.6dB (Mea. low gain mode), Gain: 0dB (Mea. low gain mode), P1dB: -21dBm (Mea. Low gain mode).

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.137-140
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• 2002

This paper is proposed a 8-bit anolog to digital converter for CMOS image sensor. A anolog to digital converter for CMOS image sensor is required function to control gain. Proposed anolog to digital converter is used frequency divider to control gain. At 3.3 Volt power supply, total static power dissipation is 8mW and programmable gain control range is 30dB. The gain control range can be easily increased with insertion of additional flip-flop at divided-by-N frequency divider circuit.

• Journal of Biomedical Engineering Research
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• v.29 no.3
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• pp.249-253
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• 2008

The indirect-contact ECG (IDC-ECG) was introduced by a prior study for daily non-intrusive measurements. To improve the signal quality and to extend the application area of IDC-ECG, close study of the frequency characteristics of the IDC-ECG is necessary. In this study, the frequency response of the active electrode for several sample clothes was measured under conditions of actual IDC-ECG measurement with human body. Higher gain in low frequency range than expected by prior study was observed. In addition to it, wide variation in gain according to the cloth type in the low frequency range was observed. Variation in gain caused by moisture variation in the clothes was also observed. This study shows that the parallel R-C connection is proper for electrode model and the resistive factor is influenced by moisture in the clothes. This study is the first that provides the frequency response of the electrode in the actual indirect-contact ECG measurement and it is expected that the results will be helpful to improve the indirect-contact ECG method.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.46-52
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• 2014

This paper presents a multiple gain controlled digital phase and frequency detector with a fast lock-time. Lock-time of the digital PLL can be significantly reduced by applying proposed adaptive gain control technique. A loop gain of the proposed digital PLL is controlled by three conditions that are very large phase difference between reference and feedback signal, small phase difference and before lock-state, and after lock-state. The simulation result shows that lock-time of the proposed multiple gain controlled digital PLL is 100 times faster than that of the conventional structure with unit gain mode.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.675-681
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• 2016

A 41dB gain control range $6^{th}$-order band-pass receiver front-end (RFE) using CMOS switched frequency translated impedance (FTI) is presented in a 40 nm CMOS technology. The RFE consists of a frequency tunable RF band-pass filter (BPF), IQ gm cells, and IQ TIAs. The RF BPF has wide gain control range preserving constant filter Q and pass band flatness due to proposed pre-distortion scheme. Also, the RF filter using CMOS switches in FTI blocks shows low clock leakage to signal nodes, and results in low common mode noise and stable operation. The baseband IQ signals are generated by combining baseband Gm cells which receives 8-phase signal outputs down-converted at last stage of FTIs in the RF BPF. The measured results of the RFE show 36.4 dB gain and 6.3 dB NF at maximum gain mode. The pass-band IIP3 and out-band IIP3@20 MHz offset are -10 dBm and +12.6 dBm at maximum gain mode, and +14 dBm and +20.5 dBm at minimum gain mode, respectively. With a 1.2 V power supply, the current consumption of the overall RFE is 40 mA at 500 MHz carrier frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.1
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• pp.68-79
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• 1992

In the high speed analog system satellite communication system, video signal processing and optical fiber interface circuits, GaAs high gain operational amplifier is advantageous due to obtain a high gain because of its low transconductance and other drawbacks, such as low frequency dispersion and process variation. Therefore in this paper, a circuit techniques for improving the voltage gain for GaAs MESFET amplifier is presented. Also, various types of existing current mirror and current mirror proposed are compared.To obtain the high differential gain, bootstrap gain enhancement technique is used and common mode feedback is employed in differential amplifier.The simulation results show that gain is higher than that of basic amplifier about 18.6dB, and stability and frequency performance of differential amplifier are much improved.