• Journal of Institute of Control, Robotics and Systems
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• v.11 no.3
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• pp.187-192
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• 2005

This paper presents the design of the Automatic Gain Control (AGC) system for the drive axis of a electro-magnetic driven cylinder gyroscope. The simulation and experimental results show that the designed AGC excites the cylinder at its natural frequency and maintains a specified amplitude of oscillations, and also track the natural frequency shifts due to temperature variations. The sensing performance of the AGC driven gyroscope is shown to be greatly improved compared to that of the open-loop driven one.

• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.125-129
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• 1987

The stability margin of the LQ regulator is investigated in the time domain. it is shown that the same guaranteed gain margin as that of the frequency domain analysis can be obtained with simple assumptions for the continuous time systems. It is also shown that the allowable modelling error bound can be expressed in terms of system matrices and Riccati equation solution. Guaranteed qain. margin and the allowable modelling error bound for the discrete time systems are also obtained by the similar procedures. In this case, through the some examples, the gain margin is shown to be less conservative than the frequency domain analysis result.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.417-420
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• 2001

In this paper, a transceiver using waveguide modules for 60 GHz band wireless LAN is implemented and analyzed. The characteristics of millimeter-wave transmitter are 0 dbm output power, 10.5 dB gain and 38 dBc spurious emition. The receiver's are 3.16 dB noise figure, 8.8 dB gain, -86dBm sensitivity. Maximum communication distance is more than loom. Intermediate frequency comply with IEEE 802.11b. The transfer of multimedia files is performed. The transceiver's data rate can vary with intermediate frequency bandwidth and the transceiver is designed more than 200 Mbps.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.3
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• pp.139-144
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• 2003

We report the results of extensive mixed mode simulations and theoretical analysis to quantify the contribution of the edge direct tunneling (EDT) current on the total gate leakage current of 80nm NMOSFET with SiO2 gate dielectric. It is shown that EDT has a profound impact on basic analog circuit building blocks such as sample-hold (S/H) circuit and the current mirror circuit. A transistor design methodology with zero gate-source/drain overlap is proposed to mitigate the EDT effect. This results in lower voltage droop in S/H application and better current matching in current mirror application. It is demonstrated that decreasing the overlap length also improves the basic analog circuit performance metrics of the transistor. The transistor with zero gate-source/drain overlap, results in better transconductance, input resistance, output resistance, intrinsic gain and unity gain transition frequency.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2001.11a
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• pp.257-261
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• 2001

This paper presents the implementation of wide-band RFIC amplifier operating from near 50MHz to 3GHz using Tachyonics SiGe HBT foundry. Voltage shunt feedback is used for the flat gain and the broad band impedance matching. Initial design parameters are calculated using the low frequency small signal analysis. Since the HBT model was not available at the design time, discrete tuning board was made for fine tuning in the low frequency range. Fabricated amplifier shows 12dB gain with 1dB fluctuation and PldB reaches 15dBm at 850MHz.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.255-259
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• 2008

In this paper, a current-mode integrator for low-voltage, low-power analog integrated circuits is presented. Using the proposed current-mode integrator, the baseband analog filter is designed for WCDMA wireless communication. To verify the proposed current-mode integrator circuit, Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS parameter is performed and achieved 44.9dB gain, 15.7MHz unity gain frequency. The described 3rd-order current-mode baseband analog filter is composed of the proposed current-mode integrator, and SFG(Signal Flow Graph) method is used to realize the baseband filter. The simulated results show 2.12MHz cutoff frequency which is suitable for WCDMA baseband block.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.260-264
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• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.9
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• pp.1618-1623
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• 2008

In this paper, a new design method for IMC-PID that adds a phase scaling factor of system identifications to the standard IMC-PID controller as a control parameter is proposed. Based on analytically derived frequency properties such as gain and phase margins, this tuning rule is an optimal control method determining the optimum values of controlling factors to minimize the cost function, integral error criterion of the step response in time domain, in the constraints of design parameters to guarantee qualified frequency design specifications. The proposed controller improves existing single-parameter design methods of IMC-PID in the inflexibility problem to be able to consider various design specifications. Its effectiveness is examined by a simulation example, where a comparison of the performances obtained with the proposed tuning rule and with other common tuning rules is shown.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.360-360
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• 2000

In this paper, a new criterion f9r determining the sampling rate of digital conroller is proposed. This paper will introduce a method fur determining the appropriate sampling rate of digital controller which can be substituted with the given analog controller, using phase margin and gain cross over frequency, not rising time or bandwidth of the closed-loop system. This method also guarantees performance of the system. Without exact modeling functions of the plant, abstracting those functions, this paper can achieve stability and aimed performance of the system, and this paper proved it with proper modeling functions.

• Journal of Biomedical Engineering Research
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• v.17 no.3
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• pp.347-354
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• 1996

This paper presents digital hearing aids signal processing system in WT(wavelet transform) domain. For implementation of hearing aids in WT domain, the gain in frequency domain is approximated in WT domain. We also present the gain selection algorithm to deal with the change of input signal power. Most transform methods produce blocking effect, and this effect degrades the convergence rate of feedback canceller. As a solution, we proposed wavelet transform bascd feedback canceller. To evaluate the performance, we compared it with LOT (lapped orthogonal transform) method in the frequency domain. This system has not shown the blocking effect, and improves convergence rate as compared with the LOT based feedback canceller.