• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1477-1483
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• 2013

This paper proposes a low-voltage current-mode integrator for a continuous-time current-mode baseband channel selection filter. The low-voltage current-mode linear cascode integrator is introduced to offer advantages of high current gain and improved unity-gain frequency. The proposed current-mode integrator has fully differential input and output structure consisting of CMOS complementary circuit. Additional cascode transistors which are operated in linear region are inserted for bias to achieve the low-voltage feature. Frequency range is also controllable by selecting proper bias voltage. From simulation results, it can be noticed that the implemented integrator achieves design specification such as low-voltage operation, current gain, and unity gain frequency.

• ETRI Journal
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• v.34 no.6
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• pp.885-891
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• 2012

This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-${\mu}m$ RF-CMOS process with a supply voltage of 3.3 V. The measured gain, $P_{1dB}$, and efficiency at $P_{1dB}$ are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.662-665
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• 2002

The growth of carbon nanotubes (CNTs) was carried out using ratio frequency plasma enhanced chemical vapor deposition (rf PECVD) system equipped with dc bias for the directional growth. Acetylene and ammonia gas were used as the carbon source and a catalyst. The relation between gas flow rate and dc bias on the growth of CNTs was investigated. We studied the relation between emission properties and the directionality of CNTs grown under different dc bias voltage.

• Journal of Electrical Engineering and Technology
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• v.13 no.2
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• pp.781-789
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• 2018

This paper proposes a new approach utilizing empirical mode decomposition (EMD) reconstruction to process vibration signals of a transformer under DC bias caused by high voltage direction transmission (HVDC), which is the potential cause of additional vibration and noise from transformer. Firstly, the Calculation Method is presented and a 3D model of transformer is simulated to analyze transformer deformation characteristic and the result indicate the main vibration is produced along axial direction of three core limbs. Vibration test system has been built and test points on the core and shell of transformer have been measured. Then, the signal reconstruction method for transformer vibration based on EMD is proposed. Through the EMD decomposition, the corrupted noise can be selectively reconstructed by the certain frequency IMFs and better vibration signals of transformer have been obtained. After EMD reconstruction, the vibrations are compared between transformer in normal work and with DC bias. When DC bias occurs, odd harmonics, vibration of core and shell, behave as a nonlinear increase and the even harmonics keep unchanged with DC current. Experiment results are provided to collaborate our theoretical analysis and to illustrate the effectiveness of the proposed EMD method.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.12
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• pp.1-6
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• 2008

In this paper, bias control circuit structure have been employed to improve the power added efficiency of the CMOS class-E power amplifier on low input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal. The proposed CMOS class-E power amplifier using bias controlled circuit has been improved the PAE on low output power level. The operating frequency is 2.14GHz and the output power is 22dBm to 25dBm. In addition to, it has been evident that the designed the structure has showed more than a 80% increase in PAE for flatness over all input power level, respectively.

• Journal of Wetlands Research
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• v.21 no.spc
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• pp.51-60
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• 2019

In this study, we performed At-site Frequency Analysis(AFA) and Regional Frequency Analysis(RFA) using the observed and climate change scenario data, and the relative root mean squared error(RMMSE) was compared and analyzed for both approaches through Monte Carlo simulation. To evaluate the rainfall quantile, the daily rainfall data were extracted for 615 points in Korea from HadGEM3-RA(12.5km) climate model data, one of the RCM(Regional Climate Model) data provided by the Korea Meteorological Administration(KMA). Quantile mapping(QM) and inverse distance squared methods(IDSM) were applied for bias correction and spatial disaggregation. As a result, it is shown that the RFA estimates more accurate rainfall quantile than AFA, and it is expected that the RFA could be reasonable when estimating the rainfall quantile based on climate change scenarios.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.7
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• pp.620-624
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• 2016

In this paper we designed a current mode logic frequency divider to transmit a baseband amplitude modulated signal. From simulation result, we studied input and output waveforms according to the variation of input bias voltage. For the purpose of the verification of the study, we designed a current mode logic frequency divider at 1,400 MHz. The designed frequency divider operates between 100 MHz and 3,000 MHz, for -33 dBm input power. The circuit draws $I_{total}=30mA$ from $V_{DD}=3V$ supply, and the simulation result shows that an amplitude modulated signal at 1,400 MHz with the modulation index of 0.5 was successfully downconverted to 700 MHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.8
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• pp.795-801
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• 2014

This paper presents an efficiency enhancement for the high power amplifier using DDBS(Digitally-controlled Dynamic Bias Switching) method which dynamically provides the power amplifier with two bias voltage levels according to the input envelope signal. It is quite easy to adjust the control signal by using a digital processing. The fabricated DDBS PA was evaluated using an 64 QAM FDD LTE signal, which has a center frequency of 2.6 GHz, a bandwidth of 10 MHz and a PAPR of 9.5 dB. The DDBS increases the power amplifier's PAE(Power-Added Efficiency) from 40.9 % to 48 %, at an average output power level of 43 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.8
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• pp.851-856
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• 2010

This paper presents an efficiency enhancement for the balanced power amplifier using DBS(Dynamic Bias Switching) method which dynamically provides the power amplifier with two bias voltage levels according to the input envelope signal. In order to apply the dynamic biases to each side of the balanced power amplifier, two switching stages are adopted. Using an OFDM signal with a bandwidth of 20 MHz and a PAR(Peak to Average Ratio) of 8.5 dB, 6 % of PAE(Power-Added Efficiency) is improved at an output power of 42.5 dBm.

• Journal of Satellite, Information and Communications
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• v.12 no.4
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• pp.115-119
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• 2017

Intermodulation distortion degrades the S/N(signal-to-noise) of the original signal and also affects the adjacent channels. Intermodulation distortion is mainly caused by the nonlinear characteristics of the power amplifier. If the power amplifier with nonlinear characteristics has a memory effect, the intermodulation distortions occurred in the power amplifier are generated in various and complex forms. The predistorter is used as a way to improve intermodulation distortions. In order to efficiently utilize the performance of the predistorter, the memory effect of the power amplifier must be reduced. In this paper, we describe the design method of bias circuit to reduce the memory effect in power amplifiers. To reduce the memory effect, the bias circuit must have a high impedance for the signal and a low impedance for the envelope(modulating signal) and the second harmonic component of the signal. To verify the performance of the bias circuit designed considering the memory effect, a power amplifier operating at 170 ~ 220MHz was designed and implemented. The designed bias circuit has a large impedance in the operating frequency band and low impedance in the envelope signal and the second harmonic of the signal. As a result of the performance measurement, it was found that the asymmetric intermodulation distortion component is improved by 3.7dB.