• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.197-200
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• 2001

Recently, Switching time is the principal factor in a design of frerquency synthesizer for Spread-Spectrum Communications. fast switching frequency synthesizer is important to improve the channel efficiency in a Frequency Hopping Spread Spectrum (FH-SS) tranceiver. In this paper, we design the frequency synthesizer with fast switching time as fast as 1${\mu}\textrm{s}$. In frequency synthesizer design, we use the interpolated PLL method inserted memory Look-up table of DDS to reduce switching time, and have result of improved channel efficiency about 20% by applying to FH-SS Transceiver.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.471-476
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• 2015

This paper describes a CMOS hysteretic DC-DC buck converter with a constant switching frequency for mobile applications. The inherent problems of a large output ripple voltage that the conventional hysteretic DC-DC buck converters has faced have been resolved by using the proposed DC-DC buck converter which employed a ramp generator circuit to be able to increase a switching frequency. The proposed architecture enables the settling response time of charge pump circuit within the converter to become less than 6us suitable for mobile applications. The proposed DC-DC buck converter was implemented by using 0.35 um BCDMOS process and die size was $1.37mm{\times}1.37mm$. The measurement results showed that the proposed circuit received the input of 3.7 V and generated output of 1.2 V with the output ripple voltages less than 20 mV under load currents of 100~400 mA at the fixed switching frequency of 2 MHz. The maximum efficiency of the proposed hysteretic buck converter was measured to be around 93%.

• Proceedings of the KIEE Conference
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• 2002.07b
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• pp.1152-1154
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• 2002

In this paper, a direct torque control method of an induction motor is proposed which enables constant switching frequency. The switching strategy of a conventional direct torque control scheme which is based on hysteresis comparator results in a variable switching frequency which depends on the speed, flux, stator voltage and hysteresis band of the comparator. This paper proposes a new switching strategy which determine the effective switching time on each switching period by comparing the ascending and descending torque slopes. The simulation results are presented to verify this proposed scheme.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.3
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• pp.266-274
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• 1991

This paper proposed the resonant DC-DC converter with constant switching frequency. Its output is controlled by the auxiliary switch which is attached in conventional MRC circuits. The average output voltage is equal to the average voltage of the auxiliary switch. If the on time of the auxiliary switch is short, output voltage is decreased. Because of using the multi resonant method, the power loss from the parasitic elements can be decreased. Experimental performance of DF ZVS Forward MRC topology with switching frequency of 1MHz is presented.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.181-184
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• 2017

This study analyzes the turn-on and turn-off transients of a metal-oxide-semiconductor field-effect transistor (MOSFET) with high-switching frequency systems. In these systems, the voltage distortion becomes serious at the output terminal of a Vienna rectifier by the turn-off delay of the MOSFET. The current has low-order harmonics through this voltage distortion. This paper describes the transient of the turn-off that causes the voltage distortion. The algorithm for reducing the sixth harmonic using a proportional-resonance controller is proposed to improve the current distortion without complex calculation for compensation. The reduction of the current distortion by high-switching frequency is verified by experiment with the 2.5-kW prototype Vienna rectifier.

• Journal of the Korean Institute of Telematics and Electronics
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• v.15 no.5
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• pp.13-18
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• 1978

A delay switching PLL (DSPLL) is proposed for improvement of the frequency acquisition Performance (pull-in range) while keeping a narrow bandwidth LPF. It has, between the phase detector and the LPF, just a simple RC delay circuit, a switch and another phase detector controlling the switching time. For the common second order PLL, the pull-in capability of the DSPLL is analyzed approximately, without considering additive white noise effect, and verified experimentally. It is shown that the delay switching extends the pull-in range significantly, as much as a half of lock-range. At the phase tracking mode, the delay switching does not function, to make the DSPLL be a normal PLL.

• Journal of Power Electronics
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• v.10 no.4
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• pp.342-350
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• 2010

Randomizing the switching frequency (RSF) to reduce the electromagnetic interference (EMI) of switching power converters is a well-known technique that has been previously discussed. The randomized pulse position (RPP) technique, in which the switching frequency is kept fixed while the pulse position (the delay from the starting of the switching cycle to the turn-on instant within the cycle) is randomized, has been previously addressed in the literature for the same purpose. This paper presents a double-hybrid technique (DHB) for EMI reduction in dc-dc switching regulators. The proposed technique employed both the RSF and the RPP techniques. To effectively spread the conducted-noise frequency spectrum and at the same time attain a satisfactory output voltage quality, two parameters (switching frequency and pulse position) were randomized, and a third parameter (the duty ratio) was controlled by a digital compensator. Implementation was achieved using field programmable gate array (FPGA) technology, which is increasingly being adopted in industrial electronic applications. To evaluate the contribution of the proposed DHB technique, investigations were carried out for each basic PWM, RPP, RSF, and DHB technique. Then a comparison was made of the performances achieved. The experimentally investigated features include the effect of each technique on the common-mode, differential-mode, and total conducted-noise characteristics, and their influence on the converter’s output ripple voltage.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.12
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• pp.2000-2007
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• 2016

Generally, in order to implement the CRM(Critical Conduction Mode), the analog controller is used rather than a digital controller because the control is simple and uses less power. However, according to the semiconductor technology development and various user needs, digital control system based on a DSP is on the rise. Therefore, in this paper, the CRM bridgeless PFC converter based on a digital control is proposed. It is necessary to detect the inductor current when it reaches zero and peak value, for calculating the on time and off time by using the current information. However, in this paper, the on-time and off-time are calculated by using the proposed algorithm without any current information. If the switching-times are calculated through the steady-state analysis of the converter, they do not reflect transient status such as starting-up. Therefore, the calculated frequency is out of range, and the transient current is generated. In order to solve these problems, limitation method of the on-time and off-time is used, and the limitation values are varied according to the voltage reference. In addition, in steady state, depending on the switching frequency, the inductance is varied because of the resonance between the inductor and the parasitic capacitance of the switching elements. In order to solve the problem, inductance are measured depending on the switching frequency. The measured inductance are used to calculate the switching time for preventing the transient current. Simulation and experimental results are presented to verify the proposed method.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.382-384
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• 2008

Hold-up time is a special requirement for the front end DC/DC converter in a server power supply. It forces the converter with the variable switching frequency to operate in a wide switching frequency range, which makes the regulation difficult and reduces the power density. In this paper a novel frequency controlled half bridge converter with the hold-up time extension circuit is proposed. During the hold-up time, the auxiliary switches are turned on, thus the resonant inductance is reduced and the voltage conversion ratio is increased. Therefore, the output capacitor of the power factor correction (PFC) circuit can be decreased, and the converter can have high power density. The proposed converter is verified by experimental results from a prototype with 700W, 400V input, and 12V output.

• Proceedings of the KIEE Conference
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• 2004.11b
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• pp.63-65
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• 2004

The recent advancement in the power electronic technique has increased the use of induction motor fed by inverter using high-frequency switching devices. Also the tendency is toward larger size and higher voltage. Therefore, The IGBT (Insulated-Gate Bipolar Transistor) that is high switching frequency element has been using increase. But, The switching surge voltage was occurred by high switching frequency of inverter has appeared a voltage doubling in the motor input terminal due to mismatching of cable characteristic impedance and motor characteristic impedance. Actually, The Switching surge voltage became the major cause to occur the insulation failure by serious voltage stress in the stator winding of induction motor. The short during rise time of switching surge and cable length is increased, the maximum transient voltage seen at the motor terminals increases. In this paper, Analyzed switching surge transient voltage of power cable pulling is used EMTP(Electromagnetic Transient Program) at the induction motor terminal and in cable.