• Title/Summary/Keyword: Frequency Scaling Algorithm

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Design of Low Power System using Dynamic Scaling (Dynamic Scaling을 이용한 저전력 시스템의 설계)

  • Kim, Do-Hun;Kim, Yang-Mo;Kim, Seung-Ho;Lee, Nam Ho
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.282-285
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    • 2002
  • In this paper, we designed of low power system by using dynamic scaling. As an effective low-power design, dynamic voltage/frequency scaling recently has received a lot of attention. In dynamic frequency scheme, all execution cycles are driven by the clock frequency that switched frequency dynamically at run time. The algorithm schedules lower frequency operators at earlier steps and higher frequency operators to later steps. This algorithm assigned the frequency for each execution cycle then it adjusted the voltage associated with the frequency.

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Acoustic Echo Cancellation using the DUET Algorithm and Scaling Factor Estimation (잡음 상황에서 DUET 블라인드 신호 분리 알고리즘과 스케일 계수 추정을 이용한 음향 반향신호 제거)

  • Kim, K.J.;Seo, J.B.;Nam, S.W.
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.416-418
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    • 2006
  • In this paper, a new acoustic echo cancellation approach based on the DUET algorithm and scaling factor estimation is proposed to solve the scaling ambiguity in case of blind separation based acoustic echo cancellation in a noisy environment. In hands-free full-duplex communication system. acoustic noises picked up by the microphone are mixed with echo signal. For this reason, the echo cancellation system may provide poor performance. For that purpose, a degenerate unmixing estimation technique, adjusted in the time-frequency domain, is employed to separate undesired echo signals and noises. Also, since scaling and permutation ambiguities have not been solved in the blind source separation algorithm, kurtosis for the desired signal selection and a scaling factor estimation algorithm are utilized in this rarer for the separation of an echo signal. Simulation results demonstrate that the proposed approach yields better echo cancellation and noise reduction performances, compared with conventional methods.

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A new Robust Wavelet Shift Keying System Using Scaling and Wavelet Functions (스케일링 함수와 웨이브릿을 이용한 잡음에 강인한 새로운 웨이브릿 편이 변조 시스템)

  • Jeong, Tae-Il
    • Journal of the Institute of Convergence Signal Processing
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    • v.9 no.2
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    • pp.98-103
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    • 2008
  • There are the frequency shift keying(FSK), phase shift keying(PSK) and amplitude shift keying(ASK) in the conventional digital communications method. In this paper, We proposed a new robust wavelet shift keying system using scaling and wavelet function in the digital communication. Wavelet Transform consist of a low frequency and high frequency coefficient. When the input signal is one, if it finds the impulse response, the signal is separated from the scaling and wavelet function. The binary data is encoded by modulator which assigned the scaling function to 1(one), and wavelet to zero(0). It was demonstrated by experiment that the proposed algorithm can be a robust noise.

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Dynamic Voltage Scaling based on Workload of Application for Embedded Processor (응용프로그램의 작업량을 고려한 임베디드 프로세서의 동적 전압 조절)

  • Wang, Hong-Moon;Kim, Jong-Tae
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.4
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    • pp.93-99
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    • 2008
  • Portable devices generally have limited energy sources, so there is a need to minimize the power consumption of processor using energy conservation methods. One of the most common energy conservation methods is dynamic voltage scaling (DVS). In this paper, we propose a new DVS algorithm which uses workload of application to determine frequency and voltage of processors. The posed DVS algorithm consists of DVS module in kernel and specified function in application. The DVS module monitors the processor utilization and changes frequency and voltage periodically. The other part monitors workload of application. With these two procedures, the processor can change the performance level to meet their deadline while consuming less energy. We implemented the proposed DVS algorithm on PXA270 processor with Linux 2.6 kernel.

A Low Dynamic Power 90-nm CMOS Motion Estimation Processor Implementing Dynamic Voltage and Frequency Scaling Scheme and Fast Motion Estimation Algorithm Called Adaptively Assigned Breaking-off Condition Search

  • Kobayashi, Nobuaki;Enomoto, Tadayoshi
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.512-515
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    • 2009
  • A 90-nm CMOS motion estimation (ME) processor was developed by employing dynamic voltage and frequency scaling (DVFS) to greatly reduce the dynamic power. To make full use of the advantages of DVFS, a fast ME algorithm and a small on-chip DC/DC converter were also developed. The fast ME algorithm can adaptively predict the optimum supply voltage ($V_D$) and the optimum clock frequency ($f_c$) before each block matching process starts. Power dissipation of the ME processor, which contained an absolute difference accumulator as well as the on-chip DC/DC converter and DVFS controller, was reduced to $31.5{\mu}W$, which was only 2.8% that of a conventional ME processor.

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An Efficient Scheduling Method based on Dynamic Voltage Scaling for Multiprocessor System (멀티프로세서 시스템을 위한 동적 전압 조절 기반의 효율적인 스케줄링 기법)

  • Noh, Kyung-Woo;Park, Chang-Woo;Kim, Seok-Yoon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.3
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    • pp.421-428
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    • 2008
  • The DVS(Dynamic Voltage Scaling) technique is the method to reduce the dynamic energy consumption. As using slack times, it extends the execution time of the big load operations by changing the frequency and the voltage of variable voltage processors. Researches, that controlling the energy consumption of the processors and the data transmission among processors by controlling the bandwidth to reduce the energy consumption of the entire system, have been going on. Since operations in multiprocessor systems have the data dependency between processors, however, the DVS techniques devised for single processors are not suitable to improve the energy efficiency of multiprocessor systems. We propose the new scheduling algorithm based on DVS for increasing energy efficiency of multiprocessor systems. The proposed DVS algorithm can improve the energy efficiency of the entire system because it controls frequency and voltages having the data dependency among processors.

The Effect Analysis and Correction of Phase errors by Satellite Attitude Errors using the FSA for the Spotlight SAR Processing (Spotlight SAR 신호처리기법 FSA를 이용한 위성 자세오차로 인한 위상오차 영향분석 및 보정)

  • Shim, Sang-Heun
    • Journal of the Korea Institute of Military Science and Technology
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    • v.10 no.2
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    • pp.160-169
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    • 2007
  • In this paper, we have described and simulated the effect analysis and correction of phase errors in the SAR rawdata induced by satellite attitude errors such as drift, jitter. This simulation is based on the FSA(Frequency Scaling Algorithm) for high resolution image formation of the Spotlight SAR. Phase errors produce the degradation of SAR image quality such as loss of resolution, geometric distortion, loss of contrast, spurious targets, and decrease in SNR. To resolve this problem, this paper presents method for correction of phase errors using the PGA(Phase Gradient Algorithm) in connection with the FSA. Several results of the phase errors correction are presented for Spotlight SAR rawdata.

DVFS Algorithm Exploiting Correlation in Runtime Distribution

  • Kim, Jung-Soo;Yoo, Sung-Joo;Kyung, Chong-Min
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.2
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    • pp.80-84
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    • 2009
  • Dynamic voltage and frequency scaling (DVFS) is an effective method to achieve low power design. In our work, we present an analytical DVFS method which judiciously exploits correlation information in runtime distribution while satisfying deadline constraints. The proposed method overcomes the previous distribution-aware DVFS method [2] which has pessimistic assumption on which runtime distributions are independent. Experimental results show the correlation-aware DVFS offers 13.3% energy reduction compared to existing distribution-aware DVFS [2].

A Study on Performance Analysis for Error Probability in SWSK Systems

  • Jeong, Tae-Il;Moon, Kwang-Seok;Kim, Jong-Nam
    • Journal of information and communication convergence engineering
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    • v.9 no.5
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    • pp.556-561
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    • 2011
  • This paper presents a new method for shift keying using the combination of scaling function and wavelet named scaling wavelet shift keying (SWSK). An algorithm for SWSK modulation is carried out where the scaling function and the wavelet are encoded to 1 and 0 in accordance with the binary input, respectively. Signal energy, correlation coefficient and error probability of SWSK are derived from error probability of frequency shift keying(FSK). The performance is analyzed in terms of error probability and it is simulated in accordance with the kind of the wavelet. Based on the results, we can conclude that the proposed scheme is superior to the performance of the conventional schemes.

Wavelet Shift Keying System Using a Binary Matching Filter (2진 정합필터를 이용한 웨이브릿 편이변조 시스템)

  • Oh, Hyoung-Jin;Jeong, Tae-Il;Lee, Tae-Oh
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.11
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    • pp.1933-1938
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    • 2008
  • There are the frequency shift keying(FSK), phase shift keying(PSK) and amplitude shift keying(ASK) in the conventional digital communications method. In this parer, We proposed the algorithm for wavelet shift keying system using a binary matching filter in the digital communication. Wavelet shift keying system are used to a scaling function(low frequency) and wavelet(high frequency) coefficients. The binary data is encoded by modulator which assigned the scaling function to 1(one), and wavelet to zero(0). Wavelet shift keying of the conventional method needs to a post-processing for the decoding. In this paper, wavelet shift keying signal is reconstructed by the decoder using a binary matching filter. So, it was able to the decoding without the post-processing. It was demonstrated by the experiment that the proposed algorithm is a validity.