• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.9
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• pp.459-466
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• 2001

This paper proposes a snubber circuit for flying capacitor multilevel inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber unit. It has such an advantage of Undeland snubber used in the two-level inverter. Compared with conventional RCD/RLD snubber for multileve1 inverter and converter, the proposed snubber keeps such good features as fewer number of components, reduction of voltage stress of main switching devices due to low overvoltage, and improved efficiency of system due to low loss snubber. In this paper, the proposed snubber is applied to three-level flying capacitor inverter and this feature is demonstrated by computer simulation and experimental result.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.448-451
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• 2000

This paper proposed a snubber circuit for flying capacitor multilevel inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber as basic snubber unit and has such an advantage of Undeland snubber used in the two-level inverter. Comparing conventional RCD/RLD snubber for multilevel in verter and converter the proposed snubber keeps such a good features as fewer number of components improved efficiency of system due to low loss snubber and reduction of voltage stress of main switching devices due to low overvoltage. Furthermore the proposed concept of constructing a snubber circuit for flying capacitor 3-level inverter and converter can apply to any level of them. In this paper the proposed snubber applies to three-level flying capacitor inverter and demonstrates its feature by computer simulation and experimental result.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.4
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• pp.746-755
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• 2001

This paper proposes a snubber circuit for flying capacitor 3-level inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber unit. It has such an advantage of Undeland snubber used in the two-level inverter. Compared with conventional RLD/RCD snubber for 3-level inverter and converter, the proposed snubber keeps such good features as fewer number of components, reduction of voltage stress of main switching devices due to low overvoltage, and improved efficiency of system due to low snubber loss. In this paper, the proposed snubber is applied to multilevel flying capacitor inverter and its feature is demonstrated by computer simulation and experimental result.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.313-316
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• 2000

This paper proposes a new solution by carrier-based SVPWM method to solve the most serious problem of Flying Capacitor Multi-level Inverter that is unbalance of capacitor voltages The voltage unbalance is occurred by the difference of each capacitor's charging and discharging time applied to Flying Capacitor Multi-level Inverter. It controls the variation of capacitor voltages into the mean'0' during some period by means of new carriers using the leg voltage redundancy in the Inverter. The solution can be easily expanded to the multi-level. Also this method can make the switching loss and conduction loss of device equal by the use of leg voltage redundancy. First the unbalance of capacitor voltage is analyzed and the conventional theory of self-balance using phase-shifted carrier is reviewed. And then the new method that is suitable to the Flying Capacitor Inverter is explained. The simulation results would be shown to verify the proposed method

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.281-285
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• 2001

This paper proposes a snubber circuit for flying capacitor multilevel inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber unit. It has such an advantage of Undeland snubber used in the two-level inverter. Compared with conventional RLD/RCD snubber for multilevel inverter and converter, the proposed snubber keeps such good features as fewer number of components, reduction of voltage stress of main switching devices due to low overvoltage, and improved efficiency of system due to low snubber loss. In this paper. the proposed snubber is applied to three-level flying capacitor inverter and its feature is demonstrated by computer simulation and experimental result.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• Journal of Power Electronics
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• v.14 no.2
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• pp.292-301
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• 2014

This paper presents a new configuration for a three-phase multilevel voltage source inverter. The main bridge is built from a classical three-phase two-level inverter and three bidirectional switches. A variable DC-link employing two unequal DC voltage supplies and four switches is connected to the main circuit in such a way that the proposed inverter produces four levels in the output voltage waveform. In order to obtain the desired switching gate signals, the fundamental frequency staircase modulation technique is successfully implemented. Furthermore, the proposed structure is extended and compared with other types of multilevel inverter topologies. The comparison shows that the proposed inverter requires a smaller number of power components. For a given number of voltage steps N, the proposed inverter requires N/2 DC voltage supplies and N+12 switches connected with N+7 gate driver circuits, while diode clamped or flying capacitor inverters require N-1 DC voltage supplies and 6(N-1) switches connected with 6(N-1) gate driver circuits. A prototype of the introduced configuration has been manufactured and the obtained simulation and experimental results ensure the feasibility of the proposed topology and the validity of the implemented modulation technique.

• Journal of Power Electronics
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• v.14 no.1
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• pp.48-60
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• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.333-334
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• 2015

본 논문은 단상 플라잉 커패시터 멀티레벨 인버터에서의 스위칭 상태 변화 횟수를 줄이는 새로운 기법을 제안하였다. 제안한 방법은 플라잉 커패시터 멀티레벨 인버터가 갖는 Redundant state 특성을 이용하며, 플라잉 커패시터 전압이 제어되는 범위 내에서 각 스위치가 최대한 적게 온/오프 하도록 Redundant state를 선택한다. 이를 단상 3-레벨 플라잉 커패시터 인버터에 적용하여 ＰＳＩＭ 시뮬레이션을 통해 유효성을 검증하였다.