• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.20-23
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• 2012

In this paper, we investigated the device performance on fluorine implantation, hot carrier reliability and RTS (random telegraph signal) noise characteristics of NMOSFETs. The capacitance of the fluorine implanted NMOSFET decreased due to the increase of the gate oxide thickness. RTS noise characteristics of the fluorine implated NMOSFET was improved approximately by 46% due to the decrease of trap density at Si/$SiO_2$ interface. The improved gate oxide quality also results in the longer hot carrier life time.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.662-667
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• 2013

The effect of fluorine ions, which can be reacted with boron in high-doped BPSG, is investigated on the contact sidewall wiggling profile in semiconductor process. In the semiconductor device, there are many contacts on $p^+/n^+$ source and drain region. However these types of wiggling profile is only observed at the $n^+$ contact region. As a result, we find that the type of plug implantation dopant can affect the sidewall wiggling profile of contact. By optimizing the proper fluorine gas flow rate, both the straight sidewall profile and the desired electrical characteristics can be obtained. In this paper, we propose a fundamental approach to improve the contact sidewall wiggling profile phenomena, which mostly appear in high-doped BPSG on next-generation DRAM products.

• Journal of the Korean Vacuum Society
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• v.5 no.4
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• pp.327-332
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• 1996

In this study, the effects of $WSi_x$, thickness and fluorine concentration in tungsten polycide gate structure on gate oxide were investigated. As $WSi_x$, thickness increases, gate oxide thickness increases with fluorine incorporation in gate oxide, and time-to-breakdown($T_{BD,50%}$) of oxide decreases. The stress change with $WSi_x$ thickness was also examined. But it is understood that the dominant factor to degrade gate oxide properties is not the stress but the fluorine, incorporated during $WSi_x$ deposition, diffused into $WSiO_2$ after heat treatment. In order to understand the effect of fluorine diffusion into oxidem fluorine ion implanted gates were compared. The thickness variation and $T_{BD,50%}$ of gate oxide is saturated over 600 $\AA$ thickness of $WSi_x$. The TEM and SIMS studies show the microstructure less than 600 $\AA$ thickness is dense and flat in surface. However, over 600$\AA$, the microstructure of $WSi_x$ is divided into two parts: upper porous phase with rugged surface and lower dense phase with smmoth interface. And this upper phase is transformed into oxygen rich crystalline phase after annealing, and the fluorine is captured in this layer. Therefore, the fluorine diffusion into the gate oxide is saturated.

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1178-1184
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• 2008

In this study, techniques of ion implantation were used in order to improve the characteristics of metal materials such as the oxidation and wear resistant. In particular it is necessary to develope their oxidation and wear resistant that could be used in severe environmental conditions. There are mainly two elementary technologies including ion implantation and/or thin film coating. Ion implantation method was performed for surface modification. As a result, it was found that some ion implantations methods such as Nb, high-temperature Nb ion implantation and Nb+C combined implantation are somewhat effective for improving the oxidation resistance of TiAl alloy. Furthermore, the fluorine PBII treatment is more effective for improving the oxidation resistance of the TiAl alloy with three-dimensional shapes. The implantation of boron ion into thin film of TiN was also effective for improving the properties of materials like high temperature wear resistance. TiCrN film was applied to the actual seal ring for steam turbines, and it was observed that its sliding property showed a successfully good performance.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.9
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• pp.623-627
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• 1999

We report a new in-situ fluorine passivation method without in implantation by employing excimer laser annealing of $SiO_{x}F_{y}$/a-Si structure and its effects on p-channel poly-Si TFTs. The proposed method doesn't require any additional annealing step and is a low temperature process because fluorine passivation is simultaneous with excimer-laser-induced crystallization. A in-situ fluorine passivation by the proposed method was verified form XPS analysis and conductivity measurement. From experimental results, it has been shown that the proposed method is effective to improve the electrical characteristics, specially field-effect mobility, and the electrical stability of p-channel poly-Si TFTs. The improvement id due to fluorine passivation, which reduces the trap state density and forms the strong Si-F bonds in poly-Si channel and $SiO_2/poly-Si$ interface. From these results, the high performance poly-Si TFTs canbe obtained by employing the excimer-laser-induced fluorine passivation method.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.62-62
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• 2015

In this study, we study the effects of CF4 plasma treatment on the characteristics of enhancement mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs). The CF4 plasma is generated by inductively coupled plasma reactive ion etching (ICP-RIE) system. The CF4 gas is decomposed into fluorine ions by ICP-RIE and then fluorine ions will effect the AlGaN/GaN interface to inhibit the electron transport of two dimension electron gas (2DEG) and increase channel resistance. The CF4 plasma method neither like the recessed type which have to utilize Cl2/BCl3 to etch semiconductor layer nor ion implantation needed high power to implant ions into semiconductor. Both of techniques will cause semiconductor damage. In the experiment, the CF4 treatment time are 0, 50, 100, 150, 200 and 250 seconds. It was found that the devices treated 100 seconds showed best electric performance. In order to prove fluorine ions existing and CF4 plasma treatment not etch epitaxial layer, the secondary ion mass spectrometer confirmed fluorine ions truly existing in the sample which treatment time 100 seconds. Moreover, transmission electron microscopy showed that the sample treated time 100 seconds did not have etch phenomena. Atomic layer deposition is used to grow Al2O3 with thickness 10, 20, 30 and 40 nm. In electrical measurement, the device that deposited 20-nm-thickness Al2O3 showed excellent current ability, the forward saturation current of 210 mA/mm, transconductance (gm) of 44.1 mS/mm and threshold voltage of 2.28 V, ION/IOFF reach to 108. As IV concerning the breakdown voltage measurement, all kinds of samples can reach to 1450 V.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.6
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• pp.590-597
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• 1991

Ion reflective index and sheet resistance in the silicon oblique range smaller than 8 degree and optimization of annealing temperature have been studied. A four point probe was used to obtain the sheet resistance after annealing, while high resolution SIMS was used to determine the Boron and Fluorine atomic profiles before and after annealing. Experimental results and theory of ion reflective index are compared. Ion reflective index was found to decrease according to increasing an ion oblique angle. We introduce a simple analytical model ion reflection, concidering the Rutherford scattering model. This result can not be explained by the conventional Gaussian model.

• Transactions on Electrical and Electronic Materials
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• v.6 no.1
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• pp.1-5
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• 2005

Continued scaling of MOS devices requires the formation of the ultra shallow and very heavily doped junction. The simulation and experiment results show that the degradation of pMOS performance in logic and SRAM pMOS devices due to the excessive diffusion of the tail and a large amount of dose loss in the extension region. This problem comes from the high-temperature long-time deposition process for forming the spacer and the presence of fluorine which diffuses quickly to the $Si/SiO_{2}$ interface with boron pairing. We have studied the method to improve the pMOS performance that includes the low-energy boron implantation, spike annealing and device structure design using TCAD simulation.

• Transactions on Electrical and Electronic Materials
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• v.11 no.3
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• pp.120-125
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• 2010

For the fabrication of PMOS and integrated semiconductor devices, B, $BF_2$ and dual elements with B and $BF_2$ can be implanted in silicon. 15 keV B ions were implanted in silicon at $7^{\circ}$ wafer tilt and a dose of $3.0{\times}10^{16}\;cm^{-2}$. 67 keV $BF_2$ ions were implanted in silicon at $7^{\circ}$ wafer tilt and a dose of $3.0{\times}10^{15}\;cm^{-2}$. For dual implantations, 67 keV $BF_2$ and 15keV B were carried out with two implantations with dose of $1.5{\times}10^{15}\;cm^{-2}$ instead of $3.0{\times}10^{15}\;cm^{-2}$, respectively. For the electrical activation, the implanted samples were annealed with rapid thermal annealing at $1,050^{\circ}C$ for 30 seconds. The implanted profiles were characterized by using secondary ion mass spectrometry in order to measure profiles. The implanted and annealed results show that concentration profiles for the ${BF_2}^+$ implant are shallower than those for a single $B^+$ and dual ($B^+$ and ${BF_2}^+$) implants in silicon. This effect was caused by the presence of fluorine which traps interstitial silicon and ${BF_2}^+$ implants have lower diffusion effect than a single and dual implantation cases. For the fabricated diodes, current-voltage (I-V) and capacitance-voltage (C-V) were also measured with HP curve tracer and C-V plotter. Electrical measurements showed that the dual implant had the best result in comparison with the other two cases for the turn on voltage characteristics.