• Title/Summary/Keyword: Fluorinated Metal Oxide

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Difluoromethane Synthesis over Fluorinated Metal Oxide (불화된 금속산화물 촉매상에서 이불화메탄의 합성)

  • Lee, Youn-Woo;Lee, Kyong-Hwan;Lim, Jong Sung;Kim, Jae-Duck;Lee, Youn Yong
    • Applied Chemistry for Engineering
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    • v.9 no.5
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    • pp.619-623
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    • 1998
  • The influences of reaction temperature, HF/DCM mole ratio, contact time and catalyst type on activity and selectivity of difluoromethane synthesis via hydrofluoriation of dichloromethane over fluorinated catalyst have been studied. It has been found that fluorinated $Cr/Al_2O_3$ catalysts, show better performance compared to pure fluorinated $Al_2O_3$ catalyst and then, non-treated catalysts demonstrate better than catalysts pretreated with hydrogen and air. The results show that the optimum reaction conditions are found as follows : reaction temperature at $340^{\circ}C$, mole ratio of HF/DCM 5 or above and contact time 20 sec. or above. With these conditions the maximum attainable yield of difluoromethane has been found to be greater than 80%. In particular, the activity and the selectivity of difluoromethane do not change with the reaction time on stream up to 8 hours.

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Mitigating Metal-dissolution in a High-voltage 15 wt% Si-Graphite‖Li-rich Layered Oxide Full-Cell Utilizing Fluorinated Dual-Additives

  • Kim, Jaeram;Kwak, Sehyun;Pham, Hieu Quang;Jo, Hyuntak;Jeon, Do-Man;Yang, A-Reum;Song, Seung-Wan
    • Journal of Electrochemical Science and Technology
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    • v.13 no.2
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    • pp.269-278
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    • 2022
  • Utilization of high-voltage electrolyte additive(s) at a small fraction is a cost-effective strategy for a good solid electrolyte interphase (SEI) formation and performance improvement of a lithium-rich layered oxide-based high-energy lithium-ion cell by avoiding the occurrence of metal-dissolution that is one of the failure modes. To mitigate metal-dissolution, we explored fluorinated dual-additives of fluoroethylene carbonate (FEC) and di(2,2,2-trifluoroethyl)carbonate (DFDEC) for building-up of a good SEI in a 4.7 V full-cell that consists of high-capacity silicon-graphite composite (15 wt% Si/C/CF/C-graphite) anode and Li1.13Mn0.463Ni0.203Co0.203O2 (LMNC) cathode. The full-cell including optimum fractions of dual-additives shows increased capacity to 228 mAhg-1 at 0.2C and improved performance from the one in the base electrolyte. Surface analysis results find that the SEI stabilization of LMNC cathode induced by dual-additives leads to a suppression of soluble Mn2+-O formation at cathode surface, mitigating metal-dissolution event and crack formation as well as structural degradation. The SEI and structure of Si/C/CF/C-graphite anode is also stabilized by the effects of dual-additives, contributing to performance improvement. The data give insight into a basic understanding of cathode-electrolyte and anode-electrolyte interfacial processes and cathode-anode interaction that are critical factors affecting full-cell performance.

Fluorine Penetration Characteristics on Various FSG Capping Layers (FSG Capping 레이어들에서의 플루오르 침투 특성)

  • Lee, Do-Won;Kim, Nam-Hoon;Kim, Sang-Yong;Eom, Joon-Chul;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.04b
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    • pp.26-29
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    • 2004
  • High density plasma fluorinated silicate glass (HDP FSG) is used as a gap fill film for metal-to-metal space because of many advantages. However, FSG films can cause critical problems such as bonding issue of top metal at package, metal contamination, metal peel-off, and so on. It is known that these problems are caused by fluorine penetration out of FSG film. To prevent it, FSG capping layers such like SRO (Silicon Rich Oxide) are needed. In this study, their characteristics and a capability to block fluorine penetration for various FSG capping layers are investigated. Normal stress and High stress due to denser film. While heat treatment to PETEOS caused lower blocking against fluorine penetration, it had insignificant effect on SiN. Compared with other layers, SRO using ARC chamber and SiN were shown a better performance to block fluorine penetration.

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Study on Fluorine Penetration of Capping Layers using FTIR analysis (FTIR을 이용한 캐핑레이어의 플루오르 침투 특성 연구)

  • Lee, Do-Won;Kim, Nam-Hoon;Kim, Sang-Yong;Kim, Tae-Hyoung;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.300-303
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    • 2004
  • To fill the gap of films for metal-to-metal space High density plasma fluorinated silicate glass (HDP FSG) is used due to various advantages. However, FSG films can have critical drawbacks such as bonding issue of top metal at package, metal contamination, metal peel-off, and so on. These problems are generally caused by fluorine penetration out of FSG film. Hence, FSG capping layers such like SRO(Silicon Rich Oxide) are required to prevent flourine penetration. In this study, their characteristics and a capability to block fluorine penetration for various FSG capping layers are investigated through FTIR analysis. FTIR graphs of both SRO using ARC chamber and SiN show that clear Si-H bonds at $2175{\sim}2300cm^{-1}$. Thus, Si-H bond at $2175{\sim}2300cm^{-1}$ of FSG capping layers lays a key role to block fluorine penetration as well as dangling bond.

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Highly Improved Electrical Properties of A1/CaF2/Diamond MISFET Fabricated by Ultrahigh Vacuum Process and Its Application to Inverter Circuit (초고진공 프로세스에 의해 제작된 A/CaF2/Diamond MISFET의 개선된 전기적 특성과 인버터회로에의 응용)

  • Yun, Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.5
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    • pp.536-541
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    • 2003
  • In order to avoid oxygen contamination on the diamond surface as far as possible during the device process, the A1/Ca $F_2$/diamond MISFET(metal-insulator-semiconductor field-effect transistor) was prepared by ultrahigh vacuum process and its electrical properties were investigated. The surface conductive layer of fluorinated diamond surface was employed for the conducting channel of the MISFET. The observed effective mobility(${\mu}$e$\_$ff/) of the MISFET was 300 c $m^2$/Vs, which is the highest value obtained until now in the diamond FET. Besides, the measured surface state density of the device was ∼10$\^$11//c $m^2$ eV, which is comparable with conventional Si MOSFET$\_$s/(metal-oxide-semiconductor field-effect-transistors). This work is the first report of the fluorinated diamond MISFET prepared by ultrahigh vacuum process and its application to inverter circuit.