• Title/Summary/Keyword: Flip-Chip

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Flip Chip Technologies

  • 김영호
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.03a
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    • pp.1-20
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    • 2002
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Low Power Flip-Flop Circuit with a Minimization of Internal Node Transition (인터널 노드 변환을 최소화시킨 저전력 플립플롭 회로)

  • Hyung-gyu Choi;Su-yeon Yun;Soo-youn Kim;Min-kyu Song
    • Transactions on Semiconductor Engineering
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    • v.1 no.1
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    • pp.14-22
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    • 2023
  • This paper presents a low-power flip-flop(FF) circuit that minimizes the transition of internal nodes by using a dual change-sensing method. The proposed dual change-sensing FF(DCSFF) shows the lowest dynamic power consumption among conventional FFs, when there is no input data transition. From the measured results with 65nm CMOS process, the power consumption has been reduced by 98% and 32%, when the data activity is 0% and 100%, respectively, compared to conventional transmission gate FF(TGFF). Further, compared to change-sensing FF(CSFF), the power consumption of proposed DCSFF is smaller by 30%.

Electromigration Behavior of the Flip-Chip Bonded Sn-3.5Ag-0.5Cu Solder Bumps (플립칩 본딩된 Sn-3.5Ag-0.5Cu 솔더범프의 electromigration 거동)

  • Choi Jae-Hoon;Jun Sung-Woo;Won Hae-Jin;Jung Boo-Yang;Oh Tae-Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.4 s.33
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    • pp.43-48
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    • 2004
  • Electromigration of Sn-3.5Ag-0.5Cu solder bumps was investigated with current densities of $3{\~}4{\times}10^4 A/cm^2$ at temperatures of $130{\~}160^{\circ}C$ using flip chip specimens which consisted of upper Si chip and lower Si substrate. Electromigration failure of the Sn-3.5Ag-0.5Cu solder bump occurred with complete consumption of Cu UBM and void formation at cathode side of the solder bump. The activation energies for electromigration of the Sn-3.5Ag-0.5Cu solder bump were measured as 0.61 eV at current density of $3{\times}10^4 A/cm^2$, 0.63 eV at $3.5{\times}10^4 A/cm^2$, and 0.77 eV at $4{\times}10^4 A/cm^2$, respectively.

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