• Title/Summary/Keyword: Flip chip Bump bonding

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Shear Strength and Aging Characteristics in Solder Bumps for High Reliability Optical Module (고신뢰성 광모듈을 위한 솔더 범프의 전단강도와 시효 특성)

  • 유정희
    • Journal of Welding and Joining
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    • v.21 no.2
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    • pp.97-101
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    • 2003
  • The change of microstructures in the base metal during transient liquid phase bonding process of directionally Ni base superalloy, GID-111 was investigated. Bonds were fabricated using a series of holding times(0~7.2ks) at three different temperatures. The flip chip bonding utilizing self-aligning characteristic of solder becomes mandatory to meet tolerances for the optical device. In this paper, a parametric study of aging condition and pad size of samples was evaluated. A TiW/Cu/electroplated Cu UBM structure was selected and the samples were aging treated to analyze the effect of intermetallic compounds with the time variations. An FIB technique was applied to the preparation of samples for TEM observations. An FIB technique is very useful to prepare TEM thin foil specimens from the solder joint interface. After aging treatment, the tendency to decrease in shear strength was measured and the structure of the solder and the UBM was observed by using SEM, TEM and EDS. As a result, the shear strength was decreased of about 21% in the 100${\mu}{\textrm}{m}$ sample at 17$0^{\circ}C$ aging compared with the maximum shear strength of the sample with the same pad size. In the case of the 12$0^{\circ}C$ aging treatment, 18% of decrease in shear strength was measured at the 100${\mu}{\textrm}{m}$ pad size sample. An intermetallic compound of Cu6Sn5 and Cu3Sn were also observed through the TEM measurement by using.

Control of Position of Neutral Line in Flexible Microelectronic System Under Bending Stress (굽힘응력을 받는 유연전자소자에서 중립축 위치의 제어)

  • Seo, Seung-Ho;Lee, Jae-Hak;Song, Jun-Yeob;Lee, Won-Jun
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.2
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    • pp.79-84
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    • 2016
  • A flexible electronic device deformed by external force causes the failure of a semiconductor die. Even without failure, the repeated elastic deformation changes carrier mobility in the channel and increases resistivity in the interconnection, which causes malfunction of the integrated circuits. Therefore it is desirable that a semiconductor die be placed on a neutral line where the mechanical stress is zero. In the present study, we investigated the effects of design factors on the position of neutral line by finite element analysis (FEA), and expected the possible failure behavior in a flexible face-down packaging system assuming flip-chip bonding of a silicon die. The thickness and material of the flexible substrate and the thickness of a silicon die were considered as design factors. The thickness of a flexible substrate was the most important factor for controlling the position of the neutral line. A three-dimensional FEA result showed that the von Mises stress higher than yield stress would be applied to copper bumps between a silicon die and a flexible substrate. Finally, we suggested a designing strategy for reducing the stress of a silicon die and copper bumps of a flexible face-down packaging system.

Fabrication of [320×256]-FPA Infrared Thermographic Module Based on [InAs/GaSb] Strained-Layer Superlattice ([InAs/GaSb] 응력 초격자에 기초한 [320×256]-FPA 적외선 열영상 모듈 제작)

  • Lee, S.J.;Noh, S.K.;Bae, S.H.;Jung, H.
    • Journal of the Korean Vacuum Society
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    • v.20 no.1
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    • pp.22-29
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    • 2011
  • An infrared thermographic imaging module of [$320{\times}256$] focal-plane array (FPA) based on [InAs/GaSb] strained-layer superlattice (SLS) was fabricated, and its images were demonstrated. The p-i-n device consisted of an active layer (i) of 300-period [13/7]-ML [InAs/GaSb]-SLS and a pair of p/n-electrodes of (60/115)-period [InAs:(Be/Si)/GaSb]-SLS. FTIR photoresponse spectra taken from a test device revealed that the peak wavelength (${\lambda}_p$) and the cutoff wavelength (${\lambda}_{co}$) were approximately $3.1/2.7{\mu}m$ and $3.8{\mu}m$, respectively, and it was confirmed that the device was operated up to a temperature of 180 K. The $30/24-{\mu}m$ design rule was applied to single pixel pitch/mesa, and a standard photolithography was introduced for [$320{\times}256$]-FPA fabrication. An FPA-ROIC thermographic module was accomplished by using a $18/10-{\mu}m$ In-bump/UBM process and a flip-chip bonding technique, and the thermographic image was demonstrated by utilizing a mid-infrared camera and an image processor.

Interfacial Reactions of Sn-Ag-Cu solder on Ni-xCu alloy UBMs (Ni-xCu 합금 UBM과 Sn-Ag계 솔더 간의 계면 반응 연구)

  • Han Hun;Yu Jin;Lee Taek Yeong
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.11a
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    • pp.84-87
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    • 2003
  • Since Pb-free solder alloys have been used extensively in microelectronic packaging industry, the interaction between UBM (Under Bump Metallurgy) and solder is a critical issue because IMC (Intermetallic Compound) at the interface is critical for the adhesion of mechanical and the electrical contact for flip chip bonding. IMC growth must be fast during the reflow process to form stable IMC. Too fast IMC growth, however, is undesirable because it causes the dewetting of UBM and the unstable mechanical stability of thick IMC. UP to now. Ni and Cu are the most popular UBMs because electroplating is lower cost process than thin film deposition in vacuum for Al/Ni(V)/Cu or phased Cr-Cu. The consumption rate and the growth rate of IMC on Ni are lower than those of Cu. In contrast, the wetting of solder bumps on Cu is better than Ni. In addition, the residual stress of Cu is lower than that of Ni. Therefore, the alloy of Cu and Ni could be used as optimum UBM with both advantages of Ni and Cu. In this paper, the interfacial reactions of Sn-3.5Ag-0.7Cu solder on Ni-xCu alloy UBMs were investigated. The UBMs of Ni-Cu alloy were made on Si wafer. Thin Cr film and Cu film were used as adhesion layer and electroplating seed layer, respectively. And then, the solderable layer, Ni-Cu alloy, was deposited on the seed layer by electroplating. The UBM consumption rate and intermetallic growth on Ni-Cu alloy were studied as a function of time and Cu contents. And the IMCs between solder and UBM were analyzed with SEM, EDS, and TEM.

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Flip Chip Solder Joint Reliability of Sn-3.5Ag Solder Using Ultrasonic Bonding - Study of the interface between Si-wafer and Sn-3.5Ag solder (초음파를 이용한 Sn-3.5Ag 플립칩 접합부의 신뢰성 평가 - Si웨이퍼와 Sn-3.5Ag 솔더의 접합 계면 특성 연구)

  • Kim Jung-Mo;Kim Sook-Hwan;Jung Jae-Pil
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.1 s.38
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    • pp.23-29
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    • 2006
  • Ultrasonic soldering of Si-wafer to FR-4 PCB at ambient temperature was investigated. The UBM of Si-substrate was Cu/ Ni/ Al from top to bottom with thickness of $0.4{\mu}m,\;0.4{\mu}m$, and $0.3{\mu}m$ respectively. The pad on FR-4 PCB comprised of Au/ Ni/ Cu from top to bottom with thickness of $0.05{\mu}m,\;5{\mu}m$, and $18{\mu}m$ respectively. Sn-3.5wt%Ag foil rolled to $100{\mu}m$ was used for solder. The ultrasonic soldering time was varied from 0.5 s to 3.0 s and the ultrasonic power was 1,400 W. The experimental results show that a reliable bond by ultrasonic soldering at ambient temperature was obtained. The shear strength increased with soldering time up to a maximum of 65 N at 2.5 s. The strength decreased to 34 N at 3.0 s because cracks were generated along the intermetallic compound between Si-wafer and Sn-3.5wt%Ag solder. The Intermetallic compound produced by ultrasonic soldering between the Si-wafer and the solder was $(Cu,Ni)_{6}Sn_{5}$.

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