• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.8
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• pp.708-713
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• 2005

An alumina membrane with nano-sized pore array by anodic oxidation using the thin film aluminum deposited on silicon wafer was fabricated. It Is important that the sample prepared by metal deposition method has a flat aluminum surface and a good adhesion between the silicon wafer and the thin film aluminum. The oxidation time was controlled by observation of current variation. While the oxalic acid with 0.2 M was used for low voltage anodization under 100 V, the chromic acid with 0.1 M was used for high voltage anodization over 100 V. The nano-sized pores with diameter of $60\~120$ nm was obtained by low voltage anodization of $40\~80$ V and those of $200\~300$ nm was obtained by high voltage anodization of $140\~200$ V. The pore widening process was employed for obtaining the one-channel with flat surface because the pores of the alumina membrane prepared by the fixed voltage method shows the structure of two-channel with rough surface. Finally, the sample was immersed to the phosphoric acid with 0.1 M concentration to etching the barrier layer.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2004.11a
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• pp.215-220
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• 2004

Molecular Dynamics(MD) method was used to investigate the change of friction force due to interaction between dislocations and a grain boundary when a Ni tip was scratched on a Cu bicrystal. The substrate comprised a Cu bicrystal containing a vertical$\Sigma=5(210)$ grain boundary. The moving tip for scratching simulation was consisted of fixed Ni atoms emulating a rigid tip. The indentation depth was $3.6\AA$ and the scratching was performed along <110>direction in the first grain. As the scratching was continued, nucleation and propagation of dislocations were observed. In the early stage, the grain boundary played as a barrier to moving dislocations and interrupting further dislocation movement with no dislocation resulting in no propagation across the grain boundary. As the Ni tip approached the grain boundary, dislocations were nucleated at the grain boundary and propagated to the second grain. However, stick-slip phenomena that were observed on a single crystal scratching were not observed in the bicrystal. And, instead, irregular oscillation of friction force was observed during the scratching due to the presence of a grain boundary.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.364.1-364.1
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• 2014

고효율 태양전지로 가기 위해서는 태양전지의 후면 패시베이션은 중요한 역할을 한다. 후면 패시베이션 막으로 사용되는 $Al_2O_3$ 막은 $Al_2O_3/Si$ 계면에서 높은 화학적 패시베이션과 Negative Fixed Charge를 가지고 있어 적합한 Barrier막으로 여겨진다. 하지만 이후에 전면 Metal paste의 소성 공정에 의해 $800^{\circ}C$이상 온도를 올려주게 됨에 따라 $Al_2O_3$ 막 내부에 결합되어 있던 수소들이 방출되어 blister가 생성되고 막 질은 떨어지게 된다. 우리는 blister가 생성되는 것을 방지하기 위한 방법으로 PECVD 장비로 SiNx를 증착하는 공정 중에 $N_2O$ 가스를 첨가하여 SiON 막을 증착하였다. SiON막은 $N_2O$가스량을 조절하여 막의 특성을 변화시키고 변화에 따라 소성시 막에 미치는 영향에 대하여 조사하였다. 공정을 위해 $156{\times}156mm2$, $200{\mu}m$, $0.5-3.0{\Omega}{\cdot}cm$ and p-type 단결정 실리콘 웨이퍼를 사용하였고, $Al_2O_3$ 막을 올리기 전에 RCA Cleaning 실행하였다. ALD 장비를 통해 $Al_2O_3$ 막을 10nm 증착하였고 RF-PECVD 장비로 SiNx막과 SiON막을 80nm 증착하였다. 소성로에서 $850^{\circ}C$ ($680^{\circ}C$) 5초동안 소성하고 QSSPC를 통해 유효 반송자 수명을 알아보았다.

• Progress in Superconductivity and Cryogenics
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• v.16 no.1
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• pp.1-5
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• 2014

We calculated the resonance tunneling energy band in the BCS gap for Type-II superconductor in which periodic potential is generated by external magnetic flux. In this model, penetrating magnetic flux was assumed to be in a fixed lattice state which is not moving by an external force. We observed the existence of two subbands when we used the same parameters as for the $Nd_{1.85}Ce_{0.15}CuO_X$ thin film experiment. The voltages at which the regions of negative differential resistivity (NDR) started after the resonant tunneling ended were in a good agreement with the experimental data in the field region of 1 T - 2.2 T, but not in the high field regions. Discrepancy occurred in the high field region is considered to be caused by that the potential barrier could not be maintained because the current induced by resonant tunneling exceeds the superconducting critical current. In order to have better agreement in the low field region, more concrete designing of the potential rather than a simple square well used in the calculation might be needed. Based on this result, we can predict an occurrence of the electromagnetic radiation of as much difference of energy caused by the 2nd order resonant tunneling in which electrons transit from the 2nd band to the 1st band in the potential wells.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.28 no.11
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• pp.1390-1397
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• 2004

This study is concerned with the thermal analysis during the cool-down period of 135,000㎥ class GT-96 membrane type LNG carrier under IMO and USCG design condition. During the cool-down period, the spraying rate for the NG cooling decreases as the temperature of NG falls down from -4$0^{\circ}C$ to -l3$0^{\circ}C$, and the spraying rate for the cooling of the insulation wall increases as the temperature gradient of the insulation wall is large. It was confirmed that there existed the largest temperature decrease at the first barrier and the first insulation, which are among the insulation wall, especially in the top side of the insulation wall under IMO and USCG design condition. Also, as the NG temperature distribution is fixed, the outer temperature condition under the design condition has influence on the temperature variation at the insulation. By the 3-D numerical calculation about the cargo tank and the cofferdam during the cool-down period, the temperature variation in hulls and insulations is precisely predicted under IMO and USCG design condition. From the comparison between two conditions; IMO design condition shows more severe temperature gradient than USCG design condition, therefore, it provides the conservative estimation of the BOG.

• Journal of the Semiconductor & Display Technology
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• v.8 no.1
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• pp.13-17
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• 2009

In PRAM applications, the devices can be made for both binary and multi-state storage. The ability to attain intermediate stages comes either from the fact that some chalcogenide materials can exist in configurations that range from completely amorphous to completely crystalline or from designing device structure such a way that mimics multiple phase chase phenomena in single cell. We have designed stack-structured phase change memory cell which operates as multi-state storage. Amorphous $Ge_xTe_{100-x}$ chalcogenide materials were stacked and a diffusion barrier was chosen for each stack layers. The device is operated by crystallizing each chalcogenide material as sequential manner from the bottom layer to the top layer. The amplitude of current pulse and the duration of pulse width was fixed and number of pulses were controlled to change overall resistance of the phase change memory cell. To optimize operational performance the thickness of each chalcogenide was controlled based on simulation results.

• Journal of the Semiconductor & Display Technology
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• v.12 no.3
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• pp.23-27
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• 2013

This paper is for enhancing the breakdown voltage of MHEMTs with an InP-etchstop layer. Gate-recess structures has been simulated and analyzed for the breakdown of the devices with the InP-etchstop layer. The fully removed recess structure in the drain side of MHEMT shows that the breakdown voltage enhances from 2V to almost 4V and that the saturation current at gate voltage of 0V is reduced from 90mA to 60mA at drain voltage of 2V. This is because the electron-captured negatively fixed charges at the drain-side interface between the InAlAs barrier layer and the $Si_3N_4$ passivation layer deplete the InGaAs channel layer more and thus decreases the electron current passing the channel layer. In the paper, the fully-recessed asymmetric gate-recess structure at the drain side shows the on-breakdown voltage enhancement from 2V to 4V in the MHEMTs.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.1971-1973
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• 2005

We fabricated an alumina membrane with nano-sized pore array by anodic oxidation using the thin film aluminum deposited on silicon wafer. It is important that the sample prepared by metal deposition method has a flat aluminum surface and a good adhesion between the silicon wafer and the thin film aluminum. The oxidation time was controlled by observation of current variation. The nano-sized pores with diameter of $60{\sim}120nm$ was obtained by $40{\sim}80$ voltage. The pore widening process was employed for obtaining the flat surface because the pores of the alumina membrane prepared by the fixed voltage method shows the structure of rough surface. Finally, the sample was immersed to the phosphoric acid with 0.1M concentration to etching the barrier layer. The sample will be applied to electronic sensors, field emission display, and template for nano- structure.

• Journal of Sensor Science and Technology
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• v.21 no.2
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• pp.103-108
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• 2012

Radiofrequency(RF) signal is a key medium to the most of the present wireless communication devices including RF identification devices(RFID) and smart sensors. However, the most critical barrier to overcome in RFID application is in the failure rate in detection. The most notable improvement in the detection was from the introduction of EPC Class1 Gen2 protocol, but the fundamental problems in the physical properties of the RF signal drew less attention. In this work, we focused on the physical properties of the RF signal in order to understand the failure rate by noting the existence of the ground planes and noise sources in the real environment. By using the mathematical computation software, Maple, we simulated the distribution of the electromagnetic field from a dipole antenna when ground planes exist. Calculations showed that the dark area can be formed by interference. We also constructed a test system to measure the failure rate in the detection of a RFID transponder. The test system was composed of a fixed RFID reader and an EPC Class1 Gen2 transponder which was attached to a scanner to sweep in the x-y plane. Labview software was used to control the x-y scanner and to acquire data. Tests in the laboratory environment showed that the dark area can be as much as 43 %. One who wants to use RFID and smart sensors should carefully consider the extent of the dark area.

• Membrane Journal
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• v.15 no.1
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• pp.62-69
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• 2005

SEBS-clay hybrid membranes were prepared by melt intercalation method with internal mixer. In the hybrid, the amount of clay content was fixed to 5 phr. MMT was intercalated or exfoliated by the ionomer and it was confirmed by X-ray diffraction method. D-spacing of the characteristic peak from MMT plate in SAXD was moved and diminished. Gas permeability, mechanical properties and thermal properties of the SEBS-clay hybrid membranes were investigated. Gas permeability through the SEBS-clay hybrid membranes decreased due to increased tortuosity made by intercalation of clay in SEBS.