• Tribology and Lubricants
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• v.28 no.6
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• pp.272-277
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• 2012

Finite element analysis was carried out using wafer-scale and particle-scale models to understand the mechanism of the fast removal rate(edge effect) at wafer edges in the chemical-mechanical polishing process. This is the first to report that a particle-scale model can explain the edge effect well in terms of stress distribution and magnitude. The results also revealed that the mechanism could not be fully understood by using the wafer-scale model, which has been used in many previous studies. The wafer-scale model neither gives the stress magnitude that is sufficient to remove material nor indicates the coincidence between the stress distribution and the removal rate along a wafer surface.

• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.146-150
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• 2021

Plasma information based virtual metrology (PI-VM) that predicts wafer-to-wafer etch rate variation after wet cleaning of plasma facing parts was developed. As input parameters, plasma information (PI) variables such as electron temperature, fluorine density and hydrogen density were extracted from optical emission spectroscopy (OES) data for etch plasma. The PI-VM model was trained by stepwise variable selection method and multi-linear regression method. The expected etch rate by PI-VM showed high correlation coefficient with measured etch rate from SEM image analysis. The PI-VM model revealed that the root cause of etch rate variation after the wet cleaning was desorption of hydrogen from the cleaned parts as hydrogen combined with fluorine and decreased etchant density and etch rate.

• International Journal of Quality Innovation
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• v.8 no.2
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• pp.132-146
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• 2007

Constructing an effective production control policy is the most important issue in wafer fabrication factories. Most of researches focus on the input regulations of wafer fabrication. Although many of these policies have been proven to be effective for wafer fabrication manufacturing, in practical, there is a need to help operators decide which lots should be pulled in the right time and to develop a systematic way to alleviate the long queues at the bottleneck workstation. The purpose of this study is to construct a photolithography workstation dispatching rule (PADR). This dispatching rule considers several characteristics of wafer fabrication and influential factors. Then utilize the weights and threshold values to design a hierarchical priority rule. A simulation model is also constructed to demonstrate the effect of the PADR dispatching rule. The PADR performs better in throughput, yield rate, and mean cycle time than FIFO (First-In-First-Out) and SPT (Shortest Process Time).

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1318-1319
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• 2011

In this paper, we analyzed of growth and electrical characteristics of micro-cracks with thermal effect in PV module. The micro-cracks are increasing the breakage risk over the whole value chine from the wafer to the finished module, because the wafer or cell is exposed to mechanical stress. we experimentally analyze the direct impact of micro-cracks on the module power and the consequences after artificial aging. The first step, we made micro-cracks in PV module by mechanical load test according to IEC 61215. Next, PV modules applied the thermal cycling test, because microcracks accelerated aging by thermal cycling test. according to IEC61215. Before every test, we checked output and EL image of PV module.

• Smart Structures and Systems
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• v.16 no.5
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• pp.835-851
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• 2015

This paper presents theoretical and experimental evaluation of the structural health monitoring (SHM) capability of piezoelectric wafer active sensors (PWAS) at elevated temperatures. This is important because the technologies for structural sensing and monitoring need to account for the thermal effect and compensate for it. Permanently installed PWAS transducers have been One of the extensively employed sensor technologies for in-situ continuous SHM. In this paper, the electro-mechanical impedance spectroscopy (EMIS) method has been utilized as a dynamic descriptor of PWAS behavior and as a high frequency standing wave local modal technique. Another SHM technology utilizes PWAS as far-field transient transducers to excite and detect guided waves propagating through the structure. This paper first presents how the EMIS method is used to qualify and quantify circular PWAS resonators in an increasing temperature environment up to 230 deg C. The piezoelectric material degradation with temperature was investigated and trends of variation with temperature were deduced from experimental measurements. These effects were introduced in a wave propagation simulation software called Wave Form Revealer (WFR). The thermal effects on the substrate material were also considered. Thus, the changes in the propagating guided wave signal at various temperatures could be simulated. The paper ends with summary and conclusions followed by suggestions for further work.

• Progress in Superconductivity
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• v.11 no.1
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• pp.36-41
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• 2009

Superconducting quantum phenomena are getting attention from the field of metrology area. Following its first successful application of Josephson effect to voltage standard, piconewton force standard was suggested as a candidate for the next application of superconducting quantum effects in metrology. It is predicted that a micron-sized superconducting Nb ring in a strong magnetic field gradient generates a quantized force of the order of sub-piconewtons. In this work, we studied the design and fabrication of Nb superconducting quantum interference device (SQUID) on an ultra-thin silicon cantilever. The Nb SQUID and electrodes were structured on a silicon-on-insulator (SOI) wafer by dc magnetron sputtering and lift-off lithography. Using the resulting SOI wafer, we fabricated V-shaped and parallel-beam cantilevers, each with a $30-{\mu}m$-wide paddle; the length, width, and thickness of each cantilever arm were typically $440{\mu}m,\;4.5{\mu}m$, and $0.34{\mu}m$, respectively. However, the cantilevers underwent bending, a technical difficulty commonly encountered during the fabrication of electrical circuits on ultra-soft mechanical substrates. In order to circumvent this difficulty, we controlled the Ar pressure during Nb sputtering to minimize the intrinsic stress in the Nb film and studied the effect of residual stress on the resultant device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.363-363
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• 2008

The development of dry etching process for sapphire wafer with plasma has been key issues for the opto-electric devices. The challenges are increasing control and obtaining low plasma induced-damage because an unwanted scattering of radiation is caused by the spatial disorder of pattern and variation of surface roughness. The plasma-induced damages during plasma etching process can be classified as impurity contamination of residual etch products or bonding disruption in lattice due to charged particle bombardment. Therefor, fine pattern technology with low damaged etching process and high etch rate are urgently needed. Until now, there are a lot of reports on the etching of sapphire wafer with using $Cl_2$/Ar, $BCl_3$/Ar, HBr/Ar and so on [1]. However, the etch behavior of sapphire wafer have investigated with variation of only one parameter while other parameters are fixed. In this study, we investigated the effect of pressure and other parameters on the etch rate and the selectivity. We selected $BCl_3$ as an etch ant because $BCl_3$ plasmas are widely used in etching process of oxide materials. In plasma, the $BCl_3$ molecule can be dissociated into B radical, $B^+$ ion, Cl radical and $Cl^+$ ion. However, the $BCl_3$ molecule can be dissociated into B radical or $B^+$ ion easier than Cl radical or $Cl^+$ ion. First, we evaluated the etch behaviors of sapphire wafer in $BCl_3$/additive gases (Ar, $N_2,Cl_2$) gases. The behavior of etch rate of sapphire substrate was monitored as a function of additive gas ratio to $BCl_3$ based plasma, total flow rate, r.f. power, d.c. bias under different pressures of 5 mTorr, 10 mTorr, 20 mTorr and 30 mTorr. The etch rates of sapphire wafer, $SiO_2$ and PR were measured with using alpha step surface profiler. In order to understand the changes of radicals, volume density of Cl, B radical and BCl molecule were investigated with optical emission spectroscopy (OES). The chemical states of $Al_2O_3$ thin films were studied with energy dispersive X-ray (EDX) and depth profile anlysis of auger electron spectroscopy (AES). The enhancement of sapphire substrate can be explained by the reactive ion etching mechanism with the competition of the formation of volatile $AlCl_3$, $Al_2Cl_6$ or $BOCl_3$ and the sputter effect by energetic ions.

• Korean Journal of Materials Research
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• v.9 no.12
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• pp.1176-1180
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• 1999

The adhesion strength and high temperature/high humidity reliability of polyetherimide (PEI) adhesive on silicon wafer after being treated by each reactive ion etching (RIE) Aluminum (Al)-chelate adhesion promoter were investigated. 180$^{\circ}$ peel test and <85$^{\circ}C$ 85%> humidity test were performed for the initial adhesion strength and high temperature/high humidity reliability, respectively. For investigating surface effect scanning electron microscope (SEM), atomic force microscope (AFM), deionized (DI)-water contact angle studies were carried out. To investigate RIE effect, PEI was treated with $^O_2$ RIE, and then laminated. The initial peel strength increased slightly from 1.6 kg/cm for the first 2 minutes, and then decreased. High temp/high humid resistance decreased rapidly by RIE etching. RIE treatment on PEI affected on both of roughness and hydrophilicity increase. Aluminum-chelate adhesion promoter was coated by spinning on silicon wafer. The initial peel strength showed no effect of adhesion promoter treatment, but high temp/high humidity resistance increased remarkably. Al-chelate adhesion promoter did not affect the roughness but increased hydrophilicity.

• Applied Microscopy
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• v.52
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• pp.1.1-1.8
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• 2022

As semiconductor device architecture develops, from planar field-effect transistors (FET) to FinFET and gate-all-around (GAA), there is an increased need to measure 3D structure sidewalls precisely. Here, we present a 3-Dimensional Atomic Force Microscope (3D-AFM), a powerful 3D metrology tool to measure the sidewall roughness (SWR) of vertical and undercut structures. First, we measured three different dies repeatedly to calculate reproducibility in die level. Reproducible results were derived with a relative standard deviation under 2%. Second, we measured 13 different dies, including the center and edge of the wafer, to analyze SWR distribution in wafer level and reliable results were measured. All analysis was performed using a novel algorithm, including auto fattening, sidewall detection, and SWR calculation. In addition, SWR automatic analysis software was implemented to reduce analysis time and to provide standard analysis. The results suggest that our 3D-AFM, based on the tilted Z scanner, will enable an advanced methodology for automated 3D measurement and analysis.

• International Journal of Quality Innovation
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• v.8 no.3
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• pp.81-112
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• 2007

In the competitive global market, firms have to keep profit from innovation activities. A firm makes profits by offering products or services at a lower cost than its competitors or by offering differentiated products at premium prices that more than compensate for the extra cost of differentiation. The IC Package and Testing technology industries were the first high technological industry to build in Taiwan. The Package and Testing industries in Taiwan adopted competitive innovation activities to become stronger. In our study, we want to know how innovation activities influence a firm operating in the IC Package and Testing industries. Our study used a questionnaire and Likert five-point scale to survey the innovation activities, customer and feedback in innovation performance in the IC Package and Testing industry. The wafer level chip size packing technology in our study indicates the innovation activities. Because we need to compare the difference between the wafer level chip size packing technology and wire bonding technology to recognize innovation and how the innovator and customer were influenced. Our conclusions are described below: (1) When the innovator adopts innovation activities that can be maintained using experiments and knowledge, using machine and decision variables more quickly will produce success; (2) Innovators should adopt innovation activities that focus on customers that use knowledge and experimentation, training time and cost. If an innovation forces customers to spend much time and cost to learn new technology or applications, the innovation will not be adopted; (3) Innovators that create innovation performance higher than his customers must also consider the impact upon their customers. We have to remind innovator to focus on why their customers have a different level of evolution in the same innovation activities.