• Journal of the Microelectronics and Packaging Society
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• v.11 no.3 s.32
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• pp.91-97
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• 2004

PBT thin films were formed by rf-magnetron sputtering on $Pt/Ti/SiO_2/Si$ substrate. Bulk-PZT target containing $5\%$-excess PbO was used. After PZT thin films had been deposited at room temperature, remaining portion of the thin film was formed by in-situ process. The ferroelectric perovskite phase was formed at $650^{\circ}C$. The leakage current property was improved dramatically by 2-step sputtering, and in the sample containing optimum thickness of room temp.-layer very low leakage current of $2{\times}10^{-7}A/cm^2$ was shown. As a result of the investigation on the leakage current mechanism, the electrical conduction mechanism in all PZT thin films formed by several conditions was confirmed as bulk-limited mechanism.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.3
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• pp.279-284
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• 2014

This paper proposes a novel OLED pixel circuit to compensate the threshold voltage variation of p-channel low temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The proposed 5-TFT OLED pixel circuit consists of 4 switching TFTs, 1 OLED driving TFT and 1 capacitor. One frame of the proposed pixel circuit is divided into initialization period, threshold voltage sensing and data programming period, data holding period and emission period. SmartSpice simulation results show that the maximum error rate of OLED current is -4.06% when the threshold voltage of driving TFT varies by ${\pm}0.25V$ and that of OLED current is 9.74% when the threshold voltage of driving TFT varies by ${\pm}0.50V$. Thus, the proposed 5T1C pixel circuit can realize uniform OLED current with high immunity to the threshold voltage variation of p-channel poly-Si TFT.

• Journal of the Korean Vacuum Society
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• v.5 no.4
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• pp.333-340
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• 1996

The properties of TiN as a barrier against Cu diffusion ere studied by sheet resistance measurement, X-ray diffraction, scanning electron microscopy, Auger electron spectroscopy, and capacitance-voltage(C-V) measurement. The sensitivities of the various methods were compared. Specimens with Cu/TiN/Ti/SiO2/Si structure were prepared by various deposition techniques and annealed at various temperatures ranging from $500^{\circ}C$ to $800^{\circ}C$ in 10%H2/90%Ar ambient for hours. As the effectiveness of the barrier property of TiN against Cu diffusion was vanished, the irregular-shaped sports were observed and outdiffused Si were detected on the surface of the Cu thin film. The C-V characteristics of the MOS capacitors varied drastically with annealing temperatures. In C-V measurement, the inversion capacitance decreased at annealing temperature range from $500^{\circ}C$ to $700^{\circ}C$ and increased remarkably at $800^{\circ}C$. These variations may be due to the Cu diffusion through TiN into $SiO_2$ and Si.

• Journal of the Korean Vacuum Society
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• v.18 no.3
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• pp.176-185
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• 2009

The realization and the performance of ICP source are strongly affected by its electrical impedance and the electric/magnetic field distribution. The ICP source impedance is determined by the antenna impedance and the plasma one. It is preferred to keep the imaginary impedance between -100 ohm to 100 ohm, since it should be avoided the high voltage formation on the antenna and abrupt impedance variation during the thin film process. The plasma uniformity is affected by the electric and magnetic field which is formed by the antenna current and voltage. The influence of azimuthal symmetry are shown by the electromagnetic simulation and the measurement result of plasma density. The radial uniformity can be controlled by locating the concentric antennas which have different diameters. The power distribution ratio and its control method are presented in the case of parallel antenna connections.

• Journal of Electrical Engineering and information Science
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• v.3 no.2
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• pp.239-244
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• 1998

Piezoelectric pressure sensors and pyroelectric infrared detectors based on ZnO thin film have been integrated with GaAs metal-semiconductor field effect transistor (MESFET) amplifiers. Surface micromachining techniques have been applied in a GaAs MESFET process to form both microsensors and electronic circuits. The on-chip integration of microsensors such as pressure sensors and infrared detectors with GaAs integrated circuits is attractive because of the higher operating temperature up to 200 oC for GaAs devices compared to 125 oC for silicon devices and radiation hardness for infrared imaging applications. The microsensors incorporate a 1${\mu}$m-thick sputtered ZnO capacitor supported by a 2${\mu}$m-thick aluminum membrane formed on a semi-insulating GaAs substrate. The piezoelectric pressure sensor of an area 80${\times}$80 ${\mu}$m2 designed for use as a miniature microphone exhibits 2.99${\mu}$V/${\mu}$ bar sensitivity at 400Hz. The voltage responsivity and the detectivity of a single infrared detector of an area 80${\times}$80 $\mu\textrm{m}$2 is 700 V/W and 6${\times}$108cm$.$ Hz/W at 10Hz respectively, and the time constant of the sensor with the amplifying circuit is 53 ms. Circuits using 4${\mu}$m-gate GaAs MESFETs are fabricated in planar, direct ion-implanted process. The measured transconductance of a 4${\mu}$m-gate GaAs MESFET is 25.6 mS/mm and 12.4 mS/mm at 27 oC and 200oC, respectively. A differential amplifier whose voltage gain in 33.7 dB using 4${\mu}$m gate GaAs MESFETs is fabricated for high selectivity to the physical variable being sensed.

• Journal of the Korean Vacuum Society
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• v.11 no.1
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• pp.1-7
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• 2002

We deposited $Ba_{0.5}Sr_{0.5}TiO_3$(BST) thin-films on Pt/Ti/$SiO_2$/Si substrates using RF magnetron sputtering method. A Substrate temperature was fixed at room temperature, while working gas flow ratio and RF Power were changed from 90:10 to 60:40 and 50 W, 75 W respectively. Also after BST thin films were deposited, we performed annealing in oxygen atmosphere using Rapid Thermal Annealing. For capacitor application we deposited Pt using E-beam evaporator of UHV system. In a structural property study through XRD measurement we found that crystallization depends on annealing rather than working gas ratio or and RF Power. Electrical properties showed relatively superior characteristic on the annealed sample with 50 W of RF Power.

• Korean Journal of Materials Research
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• v.14 no.10
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• pp.688-695
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• 2004

The capacitor contact barrier(CCB) layers have been introduced in the FeRAM integration to prevent the Pt/Al reaction during the back-end processes. Therefore, the interdiffusion and intermetallic formation in $Pt(1500{\AA})/Al(3000{\AA})$ film stacks were investigated over the annealing temperature range of $100\sim500^{\circ}C$. The interdiffusion in Pt/Al interface started at $300^{\circ}C$ and the stack was completlely intermixed after annealing over $400^{\circ}C$ in nitrogen ambient for 1 hour. Both XRD and SBM analyses revealed that the Pt/Al interdiffusion formed a single phase of $RtAl_2$ intermetallic compound. On the other hand, in the presence of TiN($1000{\AA}$) barrier layer at the Pt/Al interface, the intermetallic formation was completely suppressed even after the annealing at $500^{\circ}C$. These were in good agreement with the predicted effect of the TiN diffusion barrier layer. But the conventional TiN CCB layer could not perfectly block the Pt/Al reaction during the back-end processes of the FeRAM integration with the maximum annealing temperature of $420^{\circ}C$. The difference in the TiN barrier properties could be explained by the voids generated on the Pt electrode surface during the integration. The voids were acted as the starting point of the Pt/Al reaction in real FeRAM structure.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.7 no.2
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• pp.334-340
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• 1997

Electric and dielectric properties of the $SrTiO_3$films have been studied. The influence of impurities on $SrTiO_3$ films was evaluated to reduce the leakage current density. Acceptor doping, with a small concentration of Fe or Cr, has led to a substantial improvement to $10^{-9}$ order in the leakage current density. The experimental results can be explained by a model in which oxygen vacancies are the key defects responsible for the leakage current. The $SrTiO_3$ film 200 nm in thickness with 5 mol% excess SrO fabricated in $Ar/O_2$ at $550^{\circ}C$ obtained the lowest leakage current density $1.0 {\times} 1.0 A/\textrm{cm}^2$. The improved results can be introduced into the capacitor dielectric of giga bit DRAM memories.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.2
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• pp.207-212
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• 2013

A novel pixel circuit that uses only n-type low-temperature polycrystalline silicon (poly-Si) thin-film transistors (LTPS-TFTs) to compensate the threshold voltage variation of a OLED driving TFT is proposed. The proposed 6T1C pixel circuit consists of 5 switching TFTs, 1 OLED driving TFT and 1 capacitor. When the threshold voltage of driving TFT varies by ${\pm}0.33$ V, Smartspice simulation results show that the maximum error rate of OLED current is 7.05 % and the error rate of anode voltage of OLED is 0.07 % at Vdata = 5.75 V. Thus, the proposed 6T1C pixel circuit can realize uniform output current with high immunity to the threshold voltage variation of poly-Si TFT.

• Journal of Electrochemical Science and Technology
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• v.8 no.3
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• pp.250-256
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• 2017

A graphene electrode with a novel in-plane structure is proposed and successfully adopted for use in supercapacitor applications. The in-plane structure allows electrolyte ions to interact with all the graphene layers in the electrode, thereby maximizing the utilization of the electrochemical surface area. This novel structure contrasts with the conventional out-of-plane stacked structure of such supercapacitors. We herein compare the volumetric capacitances of in-plane- and out-of-plane-structured devices with reduced multi-layer graphene oxide films as electrodes. The in-plane-structured device exhibits a capacitance 2.5 times higher (i.e., $327F\;cm^{-3}$) than that of the out-of-plane-structured device, in addition to an energy density of $11.4mWh\;cm^{-3}$, which is higher than that of lithium-ion thin-film batteries and is the highest among in-plane-structured ultra-small graphene-based supercapacitors reported to date. Therefore, this study demonstrates the potential of in-plane-structured supercapacitors with high volumetric performances as ultra-small energy storage devices.