• Title/Summary/Keyword: Film Capacitor

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A New Organic Thin-Film Transistor based Current-driving Pixel Circuit for Active-Matrix Organic Light-Emitting Displays (유기박막트랜지스터(OFTF)를 이용한 AMOLED 픽셀 보상회로 연구)

  • Shin, A-Ram;Bae, Young-Seok;Hwang, Sang-Jun;Sung, Man-Young
    • Proceedings of the KIEE Conference
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    • 2006.10a
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    • pp.22-23
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    • 2006
  • A new current-driving pixel circuit for active-matrix organic light-emitting diodes (AMOLEDs), composed of four organic thin-film transistors (OTFTs) and one capacitor, is proposed using a current scaling method. Designing pixel circuits with OTFTs has many problems due to the instability of the OTFT parameters with still unknown characteristics of the material. Despite the problems in using OTFTs to drive the pixel circuit, our work could be set as a goal for future OTFT development. The simulation results show enhanced linearity between input data and OLEO luminescence at low current levels as well as successfully compensating the variation of the OTFTs, such as the threshold voltage and mobility.

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Structural and Electrical Properties of ZrO2 Films Coated onto PET for High-Energy-Density Capacitors

  • Park, Sangshik
    • Applied Science and Convergence Technology
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    • v.23 no.2
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    • pp.90-96
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    • 2014
  • Flexible $ZrO_2$ films as dielectric materials for high-energy-density capacitors were deposited on polyethylene terephthalate (PET) substrates by RF magnetron sputtering. The growth behavior, microstructure and electrical properties of the flexible $ZrO_2$ films were dependent on the sputtering pressure and gas ratio. Although $ZrO_2$ films were deposited at room temperature, all films showed a tetragonal crystalline structure regardless of the sputtering variables. The surface of the film became a surface with large white particles upon an increase in the $O_2/Ar$ gas ratio. The RMS roughness and crystallite size of the $ZrO_2$ films increased with an increase in the sputtering pressure. The electrical properties of the $ZrO_2$ films were affected by the microstructure and roughness. The $ZrO_2$ films exhibited a dielectric constant of 21~38 at 1 kHz and a leakage current density of $10^{-6}{\sim}10^{-5}A/cm^2$ at 300 kV/cm.

A Study on the Humidity Sensing Properties of Polyimide thin films prepared (진공증착중합법에 의해 제초된 폴리이미드 박막의 습도감지 특성에 관한 연구)

  • 황선양;김형권;이붕주;박구범;김영봉;이은학;이덕출
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.11a
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    • pp.402-405
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    • 1999
  • The Study of this paper is to establish the optimum fabricating condition of specimens using Vapor Deposition Polymerization Method which belongs to a mode of preparation of functional organic thin films with dry process and to develop thin film type humidity sensor which has good humidity sensitive Characteristics. Scanning electron microscopy Atomic force microscopy were used to analyze the characteristics of thin film and the basic structure of the humidity sensor is a parallel capacitor which consists of three layers of Al/PI/Al. The characteristics of fabricated samples were measured under various conditions and obtained linear characteristics in the range of 20∼80%RH independent of temperature change and low hysteresis characteristics.

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Recent trend of DRAM technology (DRAM기술의 최신 기술 동향)

  • 유병곤;백종태;유종선;유형준
    • Electrical & Electronic Materials
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    • v.8 no.5
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    • pp.648-657
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    • 1995
  • 정보처리의 다양화, 고속화를 위하여 장래의 집적회로는 다량의 정보를 단시간에 처리하지 않으면 안된다. 종래, 3년에 4배의 고집적화가 실현되어 LSI개발에 기술 견인차의 역할을 하고 있는 DRAM(Dynamic Random Access Memory)은 미세화기술의 한계를 우려하면서도 오히려 개발에 박차를 가하고 있다. 이러한 DRAM의 미세, 대용량화에는 미세가공 기술, 새로운 메모리 셀과 트랜지스터 기술, 새로운 회로 기술, 그 이외에 재료박막기술, Computer aided design/Design automation(CAD/DA) 기술, 검사평가기술 혹은 소형팩키지(package)기술등의 광범위한 기술발전이 뒷받침되어 왔다. 그 중에서 미세가공 기술 및 새로운 트랜지스터 기술과 메모리 셀 기술을 중심으로 개발 동향을 살펴보고 최근에 발표된 1Gbit DRAM의 시제품 기술에 대하여 분석해 보기로 한다.

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Low-temperature crystallization of high-dielectric (Ba,Sr)$TiO_3$ thin films for embedded capacitors

  • Cho, Kwang-Hwan;Kang, Min-Gyu;Kang, Chong-Yun;Yoon, Seok-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.03a
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    • pp.21-21
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    • 2010
  • (Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

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Reduction of Leakage Current and Enhancement of Dielectric Properties of Rutile-TiO2 Film Deposited by Plasma-Enhanced Atomic Lay er Deposition

  • Su Min Eun;Ji Hyeon Hwang;Byung Joon Choi
    • Korean Journal of Materials Research
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    • v.34 no.6
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    • pp.283-290
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    • 2024
  • The aggressive scaling of dynamic random-access memory capacitors has increased the need to maintain high capacitance despite the limited physical thickness of electrodes and dielectrics. This makes it essential to use high-k dielectric materials. TiO2 has a large dielectric constant, ranging from 30~75 in the anatase phase to 90~170 in rutile phase. However, it has significant leakage current due to low energy barriers for electron conduction, which is a critical drawback. Suppressing the leakage current while scaling to achieve an equivalent oxide thickness (EOT) below 0.5 nm is necessary to control the influence of interlayers on capacitor performance. For this, Pt and Ru, with their high work function, can be used instead of a conventional TiN substrate to increase the Schottky barrier height. Additionally, forming rutile-TiO2 on RuO2 with excellent lattice compatibility by epitaxial growth can minimize leakage current. Furthermore, plasma-enhanced atomic layer deposition (PEALD) can be used to deposit a uniform thin film with high density and low defects at low temperatures, to reduce the impact of interfacial reactions on electrical properties at high temperatures. In this study, TiO2 was deposited using PEALD, using substrates of Pt and Ru treated with rapid thermal annealing at 500 and 600 ℃, to compare structural, chemical, and electrical characteristics with reference to a TiN substrate. As a result, leakage current was suppressed to around 10-6 A/cm2 at 1 V, and an EOT at the 0.5 nm level was achieved.

Highly AC Voltage Fluctuation-Resistant LED Driver with Sinusoid-Like Reference

  • Ning, Ning;Tong, Zhenxiao;Yu, Dejun;Wu, Shuangyi;Chen, Wenbin;Feng, Chunyi
    • Journal of Power Electronics
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    • v.14 no.2
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    • pp.257-264
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    • 2014
  • A novel converter-free AC LED driver that is highly resistant to the fluctuation of AC voltage is proposed in this study. By removing large passive components, such as the bulky capacitor and the large-value inductor, the integration of the driver circuit is enhanced while the driving current remains stable. The proposed circuit provides LED lamps with a driving current that can follow the sinusoid waveform to obtain a very high power factor (PF) and low total harmonic distortion (THD). The LED input current produced by this driving current is insensitive to fluctuations in the AC voltage. Users will thus not feel that LED lamps are flashing during the fluctuation. Experiment results indicate that the proposed system can obtain PF of 0.999 and THD as low as 3.3% for a five-string 6 W LED load under 220 V at 50 Hz.

The Study on the Surface Reaction of $SrBi_{2}Ta_{2}O_{9}$ Film by Magnetically Enhanced Inductively Coupled Plasma (MEICP 식각에 의한 SBT 박막의 표면 반응 연구)

  • Kim, Dong-Pyo;Kim, Chang-Il
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.4
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    • pp.1-6
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    • 2000
  • Recently, SrBi$_{2}$Ta$_{2}$ $O_{9}$(SBT) and Pb(Zr,Ti) $O_{3}$(PZT) were much attracted as materials of capacitor for ferroelectric random access memory(FRAM) with higher read/ write speed, lower power consumption and nonvolartility. SBT thin film has appeared as the most prominent fatigue free and low operation voltage. To highly integrate FRAM, SBT thin film has to be etched. A lot of papers have been reported over growth of SBT thin film and its characteristics. However, there are few reports about etching SBT thin film owing to difficult of etching ferroelectric materials. SBT thin film was etched in CF$_{4}$Ar plasma using magnetically enhanced inductively coupled plasma (MEICP) system. In order to investigate the chemical reaction on the etched surface of SBT thin films, X-ray Photoelecton spectrosocpy (XPS) and Secondary ion mass spectroscopy(SIMS) was performed.

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Etching characteristic of SBT thin film by using Ar/$CHF_3$ Plasma (Ar/$CHF_3$ 플라즈마를 이용한 SBT 박막에 대한 식각특성 연구)

  • 서정우;이원재;유병곤;장의구;김창일
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.11a
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    • pp.41-43
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    • 1999
  • Among the feffoelectric thin films that have been widely investigated for ferroelectric random access memory (FRAM) applications, SrBi$_2$Ta$_2$$O_{9}$ thin film is appropriate to memory capacitor materials for its excellent fatigue endurance. However, very few studies on etch properties of SBT thin film have been reported although dry etching is an area that demands a great deal of attention in the very large scale integrations. In this study, the a SrBi$_2$Ta$_2$$O_{9}$ thin films were etched by using magnetically enhanced inductively coupled Ar/CHF$_3$ plasma. Etch properties, such as etch rate, selectivity, and etched profile, were measured according to gas mixing ratio of CHF$_3$(Ar$_{7}$+CHF$_3$) and the other process conditions were fixed at RF power of 600 W, dc bias voltage of 150 V, chamber pressure of 10 mTorr. Maximum etch rate of SBT thin films was 1750 A77in, under CHF$_3$(Ar+CHF$_3$) of 0.1. The selectivities of SBT to Pt and PR were 1.35 and 0.94 respectively. The chemical reaction of etched surface were investigated by X-ray photoelectron spectroscopy (XPS) analysis. The Sr and Ta atoms of SBT film react with fluorine and then Sr-F and Ta-F were removed by the physical sputtering of Ar ion. The surface of etched SBT film with CHF$_3$(Ar+CHF$_3$) of 0.1 was analyzed by secondary ion mass spectrometer (SIMS). Scanning electron microscopy (SEM) was used for examination of etched profile of SBT film under CHF$_3$(Ar+CHF$_3$) of 0.1 was about 85˚.85˚.˚.

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Thermal Process Effects on Grain Size and Orientation in $(Bi,La)_4Ti_3O_{12}$ Thin Film Deposited by Spin-on Method (스핀 코팅법으로 증착한 $(Bi,La)_4Ti_3O_{12}$ 박막의 후속 열공정에 따른 입자 크기 및 결정 방향성 변화)

  • Kim, Young-Min;Kim, Nam-Kyeong;Yeom, Seung-Jin;Jang, Gun-Eik;Ryu, Sung-Lim;Kweon, Soon-Yong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.192-193
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    • 2006
  • A 16Mb ITIC FeRAM device was fabricated with BLT capacitors. The average value of the switchable 2 polarization obtained m the 32k-array (unit capacitor size: 068 ${mu}m^2$) capacitors was about 16 ${\mu}C/cm^2$ at 3V and the uniformity within an 8-inch wafer was about 2.8%. But a lot of cells were failed randomly during the measuring the bit-line signal of each cell. It was revealed that the Grain size and orientation of the BLT thin film were severely non-uniform. Therefore, the uniformity of the grain size and orientation was improved by changing the process conditions of post heat treatment. The temperature of nucleation step was the very effective on varying the microstructure of the BLT thin film. The optimized temperature of the nucleation step was $560^{\circ}C$.

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