• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.9
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• pp.40-44
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• 2006

This study investigated a new tuneable bandpass filter based on coplanar waveguide coupled line structure, and using the varactor diode for tuning the center frequency of the filter. The filter was designed by a commercial simulator and had a tuning range of 180[MHz] from 0.95[GHz] to 1.13[GHz]. The filter acceptable values regarding the insertion loss was less than 3[dB] and its return loss greater than 12[dB]. The figure of merit of the implemented tuneable filter increased with the reverse bias voltage up to 14[V] on the varactor diode. The proposed filter has a promising future as it can be used in integration processes and in various materials as substrate.

• Proceedings of the KIEE Conference
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• 2002.11d
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• pp.21-23
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• 2002

We designed and manufactured helical magnetic flux compression generator, in which, the current density was reduced by increasing the number of wires by stages, and the voltage between wires was reduced by decreasing the time rate of inductance change. The figure of merit and the energy multiplication ratio of the generator were measured as a function of current density flowing through coil and their characteristics were analyzed. When the current density of coil was more than 250 kA/cm, the figure of merit and the energy multiplication ratio were decreased rapidly.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.6
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• pp.543-549
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• 2003

It is important to consider the nonlinear effects of the HPA(High Power Amplifier) in the OFDM communication systems and other digital communication systems as well. In this paper, we investigate a new performance figure-of$.$merit(D) that reflects both power and spectrum efficiencies. The performance figure-of-merit is expressed to include the spectrum and power efficiencies that depend on the magnitude of IBO(Input Backoff) and the number of subcarriers. So, we analyze the variation characteristics of the power efficiency and spectrum efficiency which has the tradeoff relationship.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.11
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• pp.43-48
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• 2010

The main features of a dielectric-loaded surface plasmon polariton waveguide are analyzed such as mode effective index and propagation length. These parameters are calculated using the finite element method for different metal-polymer pairs while varying the ridge width and thickness. As a performance metric, we employ the 2D figure of merit including two conflicting parameters i.e. mode effective index and propagation length. The results obtained here allow one to identify the parameter range for realizing the dielectric-loaded surface plasmon polariton waveguide and to choose dimension and material of the ridge for subwavelength confinement and moderate propagation loss at telecom wavelengths.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.353-356
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• 2004

This paper discribes the analysis of the I-V characteristics of 4H-SiC DiMOSFET with single epi-layer Silicon Carbide has been around for over a century. However, only in the past two to three decades has its semiconducting properties been sufficently studied and applied, especially for high-power and high frequency devices. We present a numerical simulation-based optimization of DiMOSFET using the general-purpose device simulator MINIMIS-NT. For simulation, a loin thick drift layer with doping concentration of $5{\times}10^{15}/cm^3$ was chosen for 1000V blocking voltage design. The simulation results were used to calculate Baliga's figure of Merit (BFOM) as the criterion structure optimization and comparison.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.67-70
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• 2003

In this paper the main topologies of one-bit full adders, including the most interesting of those recently proposed, are analyzed and compared for speed, power consumption, and power-delay product. The comparison has been performed on circuits, optimized transistor dimension to minimize power-delay product. The investigation has been carried out with properly defined simulation runs on a Cadence environment using a 0.25-${\mu}m$ process, also including the parasitics derived from layout. Performance has been also compared for different supply voltage values. Thus design guidelines have been derived to select the most suitable topology for the design features required. This paper also proposes a novel figure of merit to realistically compare n-bit adders implemented as a chain of one-bit full adders. The results differ from those previously published both for the more realistic simulations carried out and the more appropriate figure of merit used. They show that, except for short chains of blocks or for cases where minimum power consumption is desired, topologies with only pass transistors or transmission gates are not attractive.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.175-180
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• 2008

Thermoelectric materials convert temperature difference to electric power for power generation and vice versa for refrigeration. Recent advances in enhancing the thermoelectric figure-of-merit shed light on efficient power generation from the waste heat available in industries and vehicles. Nanoscale phenomena with both nanoscale constituent-embedded bulk samples and nanoscale materials proving enhanced thermoelectric performance have been widely reviewed. Bulk materials of crystal-orientation and nano-structured particle embedding seem to promise a higher thermoelectric figure-of-merit and an effective power generation application. As a preliminary study, Si-Ge nanocomposite was prepared with spark plasma sintering method and its properties were examined.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.362-363
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• 2006

In this study, the filter was designed for tuning center frequency and fabricated using ($Sr,Ba)TiO_3$ ferroelectrics and $YBa_2CuO_7$ high temperature superconductor thin film. The best result in figure of merit was 35 when the $Ba_{0.5}Sr_{0.5}TiO_3$ thin film deposition temperature was $600^{\circ}C$, the post anneal condition was $600^{\circ}C$, 10min in 1atm, $O_2$. When using $20{\mu}m$ IDC pattern gap. The higher tunability was obtained than using $30{\mu}m$ pattern gap.

• Proceedings of the Korean Magnestics Society Conference
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• 1997.05a
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• pp.18-19
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• 1997

• Journal of the Korean Society for Heat Treatment
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• v.27 no.5
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• pp.230-234
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• 2014

IGZO/Ag bi-layered films were deposited on glass substrate at room temperature with radio frequency and direct current magnetron sputtering, respectively to consider the effect of Ag buffer layer on the electrical, optical and structural properties. For all deposition, while the thickness of Ag buffer layer was varied as 10, 15, and 20 nm, The thickness of IGZO films were kept at 100 nm, In a comparison of figure of merit, IGZO films with 15 nm thick Ag buffer layer show the higher figure of merit ($1.1{\times}10^{-2}{\Omega}^{-1}$) than that of the IGZO single layer films ($3.7{\times}10^{-4}{\Omega}^{-1}$). From the observed results, it is supposed that the IGZO 100 nm/Ag 15 nm bi-layered films may be an alternative candidate for transparent electrode in a transparent thin film transistor device.