• Elastomers and Composites
• /
• v.38 no.2
• /
• pp.103-121
• /
• 2003

The application of powerful ultrasound to rubber recycling is a very recent field of study. An ultrasonic field creates high frequency extension-contraction stresses by acoustic cavitation. The breakdown of rubber network occurs primarily around pulsating cavities due to the highest level of strain produced by high-power ultrasound. Stronger reductions of cross-link density were observed at a higher pressure, indicating an important role of pressure during ultrasonic recycling. Visible bubbles were observed during ultrasonic treatment as a proof of acoustic cavitation. Shearing effect has a significant influence on improving the efficiency of ultrasonic treatment. After the ultrasonic treatment, the cross-link densities of NR/SBR blends were lower than those of NR and SBR due to the reduced degree of unsaturation and chemical reactions. Carbon black fillers increase the probability of bond scission during ultrasonic treatment, due to the restricted mobility. The mechanical properties of ground tire rubber (GRT)/HDPE blends were improved by ultrasonic treatment and dynamic revulcanization. Ultrasonic treatment of GRT in the presence of HDPE matrix was found to give better mechanical properties due to the chemical reactions between rubber and plastic phases.

• ETRI Journal
• /
• v.25 no.3
• /
• pp.203-209
• /
• 2003

This paper reports on our investigation of DC and RF characteristics of p-channel metal oxide semiconductor field effect transistors (pMOSFETs) with a compressively strained $Si_{0.8}Ge_{0.2}$ channel. Because of enhanced hole mobility in the $Si_{0.8}Ge_{0.2}$ buried layer, the $Si_{0.8}Ge_{0.2}$ pMOSFET showed improved DC and RF characteristics. We demonstrate that the 1/f noise in the $Si_{0.8}Ge_{0.2}$ pMOSFET was much lower than that in the all-Si counterpart, regardless of gate-oxide degradation by electrical stress. These results suggest that the $Si_{0.8}Ge_{0.2}$ pMOSFET is suitable for RF applications that require high speed and low 1/f noise.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.11a
• /
• pp.63-63
• /
• 2009

Many researchers have been studied as active and transparent electrode using ZnO (Zinc oxide) inorganic semiconductor material due to their good properties such as wide band-gap and high electrical properties compared with amorphous-Si. In this study, we fabricated ZnO films by the RF magnetron sputtering method at a low temperature for a channel layer in thin-film transistor (TFT) and investigated the characteristics of sputtered ZnO films. Also, the electrical properties of TFT using ZnO channel layer such as field effect mobility(${\mu}$), threshold voltage ($V_{th}$), and $I_{on/off}$ ratio are investigated for the application of the display and electronic devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.11a
• /
• pp.61-61
• /
• 2009

P-type SGS-TFTs with 10 ${\mu}m$ channel length and two channel widths; $W_1=5{\mu}m$ and $W_2=10{\mu}m$ which has gate insulator made of 20nm $SiO_2$ and 80nm SiNx was fabricated and the electrical properties of them were measured. The field-effect mobility was increased from 95.84 to 104.19 $cm^2/V-s$ and threshold voltage also increased from -0.802 V to -0.954 V, when channel width is increased from5 ${\mu}m$ to 10 ${\mu}m$. Subthreshold swing decreased from 0.418 to 0.343 V/dec and $I_{on/off}$ ratio increased from $4.77{\times}10^7$ to $7.30{\times}10^7$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.11a
• /
• pp.39-39
• /
• 2009

We fabricated p-channel TFTs based on poly Silicon. The 35nm thickness silicon dioxide layer structure got higher $I_{on}/I_{off}$ ratio, field-effect Mobility and output current than 10nm thickness. And 35nm layer showed low leakage current and threshold voltage. So, 35nm thickness silicon dioxide layer TFTs are faster reaction speed and lower power consumption than 10nm thickness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.11a
• /
• pp.62-62
• /
• 2009

Electrical properties of SGS-TFT with 5/5 ${\mu}m$ channel width and length which gate insulator is made of 20nm $SiO_2$ and 80nm $SiN_x$ was fabricated and measured at various temperatures. The field-effect mobility was decreased from 86.25 to 80.42 $cm^2/Vs$ and threshold voltage also decreased from -1.5792 to -1.0492 V, when temperature is increased from room temperature to $100^{\circ}C$. Subthreshold swing, also, increased from 0.3212 to 0.4818 V/dec and $I_{on/off}$ ratio decreased from $5.05{\times}10^7$ to $6.93{\times}10^5$.

• Proceedings of the IEEK Conference
• /
• 2004.06b
• /
• pp.489-492
• /
• 2004

In this paper, we demonstrate polymer thin-film transistors (TFTs) on a paper-based flexible substrate. As a substrate, commercially available photo-paper is used with Parylene coating. The parylene layer enables conventionally used wet chemical process and vacuum deposition processes for electrodes and gate insulator. As an active channel layer, we used poly-3-hexylthiophene (P3HT) which is solution process. Field effect mobility up to $(0.06 {\pm} 0.02) cm^2/Vs$ and on/off ratio of $10^3 {\~}10^4$ are achieved on a photo-paper.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.329-329
• /
• 2016

Large-area graphene films produced by means of chemical vapor deposition (CVD) are polycrystalline and thus contain numerous grain boundaries that can greatly degrade their performance and produce inhomogeneous properties. A better grain boundary engineering in CVD graphene is essential to realize the full potential of graphene in large-scale applications. Here, we report a defect-selective atomic layer deposition (ALD) for stitching grain boundaries of CVD graphene with ZnO so as to increase the connectivity between grains. In the present ALD process, ZnO with hexagonal wurtzite structure was selectively grown mainly on the defect-rich grain boundaries to produce ZnO-stitched CVD graphene with well-connected grains. For the CVD graphene film after ZnO stitching, the inter-grain mobility is notably improved with only a little change in free carrier density. We also demonstrate how ZnO-stitched CVD graphene can be successfully integrated into wafer-scale arrays of top-gated field effect transistors on 4-inch Si and polymer substrates, revealing remarkable device-to-device uniformity.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.04a
• /
• pp.72-73
• /
• 2009

In this study, we fabricated of pentacene organic thin film trasistor(OTFT), which used aluminum oxide for the gate insulator on glass substrate. Aluminum oxide for OTFTs was deposited on the gate layer by E-beam evaporation. aluminum oxide fabricated various deposition rate. In this case of the deposition rate of $0.1\;{\AA}$, the fabricated aluminum oxide gate insulator OTFT showed a threshold voltage of -1.36V, an on/off current ratio of $1.9{\times}l0^3$ and field effect mobility $0.023\;cm^2/V_s$.

• Proceedings of the KIEE Conference
• /
• 2011.07a
• /
• pp.1499-1500
• /
• 2011

In this paper, we investigated the electrical properties change of 6,13-bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) depending on polymer blend. We fabricated organic thin film transistor (OTFT) using blending solution of small molecule and polymer. In this study poly(2-methoxy-5-(2-ethyl-hexyloxy)-1,4-phenylene-vinylene) (MEH-PPV), poly (9-vinylcarbazole) (PVK), poly [N,N'-bis(4-butylphenyl)-N,N'-bis(phenyl)benzidine] (poly-TPD), poly(${\alpha}$-methyl styrene), Poly(methyl methacrylate) (PMMA) are used as a polymer. Fabricated OTFT with blending solution of TIPS-pentacene and PVK shows best performance in this experiment. OTFT fabricated by blending solution of TIPS-pentacene and PVK shows field effect mobility of 0.0189 $cm^2/V{\cdot}s$, on/off ratio of 1.9E-5 and threshold voltage of 7.4 V.