• 제어로봇시스템학회논문지
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• 제4권2호
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• pp.264-272
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• 1998

This paper proposes a fault detection and recovery mechanism for a fault-tolerant Mini-MAP system, and provides detailed techniques for its implementation. This paper considers the fault-tolerant Mini-MAP system which has dual layer structure from the LLC sublayer down to the physical layer to cope with the faults of those layers. For a good fault detection, a redundant and hierarchical fault supervision architecture is proposed and its implementation technique for a stable detection operation is provided. Information for the fault location is provided from data reported with a fault detection and obtained by an additional network diagnosis. The faults are recovered by the stand-by sparing method applied for a dual network composed of two equivalent networks. A network switch mechanism is proposed to achieve a reliable and stable network function. A fault-tolerant Mini-MAP system is implemented by applying the proposed fault detection and recovery mechanism.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제12권10호
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• pp.4774-4796
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• 2018

Wireless sensor networks are composed of a large number of inexpensive and tiny sensors used in different areas including military, industry, agriculture, space, and environment. Fault tolerance, which is considered a challenging task in these networks, is defined as the ability of the system to offer an appropriate level of functionality in the event of failures. The present study proposed an intelligent throughput descent and distributed energy-efficient mechanism in order to improve fault tolerance of the system against soft and permanent faults. This mechanism includes determining the intelligent neighborhood radius threshold, the intelligent neighborhood nodes number threshold, customizing the base paper algorithm for distributed systems, redefining the base paper scenarios for failure detection procedure to predict network behavior when running into soft and permanent faults, and some cases have been described for handling failure exception procedures. The experimental results from simulation indicate that the proposed mechanism was able to improve network throughput, fault detection accuracy, reliability, and network lifetime with respect to the base paper.

• 한국정보처리학회논문지
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• 제7권8호
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• pp.2497-2504
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• 2000

이 논문에서는 웹 서버 장애 항목을 정의하고, 장애를 진단하기 위한 규칙 및 복구 방법을 INBANCA기법을 이용하여 제안하였다. 장애 항목으로 프로세스 장애, 서버 과부하, 인터페이스 장애, 구성 및 성능 장애를 정의하였으며, 각 장애 항목을 진단하기 위한 지식을 활성 네트워크기법을 적용하여 표현하고, 이를 시스템 레벨 장애 진단 생성규칙과 서비스 레벨에 진단 생성규칙으로 정형화하였다. 또한 사례기반의 웹 서버 장애 복구를 위한 복구 규칙 정의 및 사례 라이브러리 구축을 통하여 환경 변수에 적응적인 복구 메커니즘을 제안하였다. 그리고 제안한 장애 진단규칙 및 복구 메커니즘의 타당성을 증명하기 위한 장애 환경 구성 및 각 장애 환경에 대한 생성규칙 적용과 복구과정을 실험을 통하여 제시하였다. 이 논문에서는 기하 급수적으로 증가하는 웹 서버의 장애 관리를 위한 메커니즘을 제안함으로써 웹 서버 관리를 위한 관리자의 노력을 최소화하고, 지능적인 장애 관리를 위한 방법론을 제시하고자 한다.

• 인터넷정보학회논문지
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• 제3권5호
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• pp.31-39
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• 2002

인터넷의 초고속 성장과 멀티미디어 데이터의 급격한 증가로 고속의 전송 매체와 인터페이스 시스템이 요구되고 있다. 이러한 고속의 네트워크 대역폭을 지원하기 위한 대안으로 다중(Multiple) NIC가 개발되고 연구되어 왔다. 다중 NIC를 사용함으로써 기존 네트워크 환경의 큰 변화 없이 고속의 LAN 환경을 구축할 수 있으므로 고성능. 저비용의 효과를 얻을 수 있다. 그러나 대용량 다중 NIC에 SPOF(Singe Point Of Failure) 결함으로 시스템 중단이 생기면, 대용량의 멀티미디어 데이터를 서비스하는 시스템인 만큼 커다란 손실을 가져오게 된다. 따라서 본 논문에서는 결함으로 오는 손실을 방지하기 위해 결함 허용 기법을 사용하여 '결함 허용 다중 NIC'에 대해서 연구한다. 기존의 TMR, Primary-Standby 기법. Watchdog Timer 기법에서 발생되는 자원에 대한 가용성과 내구성의 비효율적인 부분을 고려하여, 동적으로 검출 주기를 변환하여 다운타임을 최소화 할 수 있는 효율적인 결함 허용 메커니즘을 설계하여 제안한다. 결과적으로 본 논문에서 제안한 결함 허용 기법은 결함이 발생하여 생기는 오버헤드 시간을 줄이고자, Fault Detection에서 소요되는 Timeout 시간을 감소시켜 시스템 전반적으로 다운타임을 최소화시킬 수 있다.

• ETRI Journal
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• 제33권1호
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• pp.50-59
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• 2011

In the current very deep submicron technology era, fault tolerant mechanisms perform an essential function to cope with the effects of soft errors. To evaluate the effectiveness of the fault tolerant mechanism, reliability engineers use simulated fault injections using either saboteur modules or mutants in the simulation model. However, the two methods suffer from both inefficiency in the simulation mechanism and difficulties with the experimental setups. To overcome these inefficiencies, we propose the Verilog-based simulated fault injection (VFI) technique. VFI has the following advantages. First, modification of the design model is unnecessary. Second, the fault injection simulation procedure is simple and efficient. Third, various types of fault injection experiments can be performed. To evaluate the effectiveness of the proposed methodology, we developed a VFI environment using the ICARUS Verilog Simulator. From the experimental results, we were able to qualitatively evaluate the reliability of the target simulation models and to assess the effectiveness of the employed fault-tolerance mechanisms.

• Journal of Information Processing Systems
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• 제17권2호
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• pp.242-252
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• 2021

Following the intuition that the local information in time instances is hardly incorporated into the posterior sequence in long short-term memory (LSTM), this paper proposes an attention augmented mechanism for fault diagnosis of the complex chemical process data. Unlike conventional fault diagnosis and classification methods, an attention mechanism layer architecture is introduced to detect and focus on local temporal information. The augmented deep network results preserve each local instance's importance and contribution and allow the interpretable feature representation and classification simultaneously. The comprehensive comparative analyses demonstrate that the developed model has a high-quality fault classification rate of 95.49%, on average. The results are comparable to those obtained using various other techniques for the Tennessee Eastman benchmark process.

• 한국전자통신학회논문지
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• 제3권4호
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• pp.260-265
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• 2008

수용가 시스템에서 발생하는 아크고장은 전기화재의 직접적인 원인이 되지만 기존의 고장검출 메커니즘으로는 확인이 어렵다. 따라서 본 연구에서는 전기화재의 주 원인이 되고 있는 아크고장의 원인을 분석하고 아크고장 기본 검출 메커니즘을 설계하였다. 또한 아크고장 판단의 정확도를 제고시킴으로써 오동작을 최소화할 수 있는 신호처리 기반의 아크고장 판단 방법론을 제안하였다. 끝으로, 하나의 돌입전류에 대해 이산 프리에 변환(DFT)과 이산 웨이블릿 변환(DWT)을 적용, 그 특성을 분석함으로써 신호척리 기반 고장판단 기법의 적용 방법론을 보였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 학술대회 논문집 정보 및 제어부문
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• pp.107-109
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• 2005

BACnet(Building Automation and Control networks) is a standard data communication protocol designed specifically for building automation and control systems. BACnet provides BACnet/IP Protocol for data communication through the internet. BACnet device transmits BACnet broadcast messages and BACnet/IP messages using conventional IP technologies. Specially, BBMD(BACnet Broadcasting Management Device) is used to deliver BACnet broadcast messages. In this study, we propose a mechanism of fault tolerant BBMD in the BACnet/IP protocol. The Fault Tolerant BBMD mechanism(FTBM) improves the connectivity of BACnet/IP networks by inheriting the operation of BBMD in the networks. The FTBM is implemented with added functions to the original BACnet/IP protocol so that it can be applied together with original BACnet/IP devices. We also prove the FTBM's backward compatibility with original BACnet/IP protocol using experimental analysis.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2002년도 춘계학술대회논문집
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• pp.39-52
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• 2002

Research Direction The significant research direction in mechanical fault diagnosis area: Theorles and approaches for fault feature extracting and fault classification. Identification Complicated fault generating mechanism and its model Intelligent fault diagnosis system (including the expert system and network based remote diagnosis system) One of the Key Points： Fault feature extracting techniques based on (modern) signal processing(omitted)

• ETRI Journal
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• 제39권4호
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• pp.605-613
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• 2017

Simulated fault injection (SFI) is widely used to assess the effectiveness of fault tolerance mechanisms in safety-critical embedded systems (SCESs) because of its advantages such as controllability and observability. However, the long test time of SFI due to the large number of test cases and the complex simulation models of modern SCESs has been identified as a limiting factor. We present a method that can accelerate an SFI tool using a checkpoint forwarding (CF) technique. To evaluate the performance of CF-based SFI (CF-SFI), we have developed a CF mechanism using Verilog fault-injection tools and two systems under test (SUT): a single-core-based co-simulation model and a triple modular redundant co-simulation model. Both systems use the Verilog simulation model of the OpenRISC 1200 processor and can execute the embedded benchmarks from MiBench. We investigate the effectiveness of the CF mechanism and evaluate the two SUTs by measuring the test time as well as the failure rates. Compared to the SFI with no CF mechanism, the proposed CF-SFI approach reduces the test time of the two SUTs by 29%-45%.