• 제목/요약/키워드: Fast computation

검색결과 750건 처리시간 0.021초

GPU 컴퓨팅에 의한 고속 Double Random Phase Encoding (Fast Double Random Phase Encoding by Using Graphics Processing Unit)

  • 사이플라흐;문인규
    • 한국멀티미디어학회:학술대회논문집
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    • 한국멀티미디어학회 2012년도 춘계학술발표대회논문집
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    • pp.343-344
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    • 2012
  • With the increase of sensitive data and their secure transmission and storage, the use of encryption techniques has become widespread. The performance of encoding majorly depends on the computational time, so a system with less computational time suits more appropriate as compared to its contrary part. Double Random Phase Encoding (DRPE) is an algorithm with many sub functions which consumes more time when executed serially; the computation time can be significantly reduced by implementing important functions in a parallel fashion on Graphics Processing Unit (GPU). Computing convolution using Fast Fourier transform in DRPE is the most important part of the algorithm and it is shown in the paper that by performing this portion in GPU reduced the execution time of the process by substantial amount and can be compared with MATALB for performance analysis. NVIDIA graphic card GeForce 310 is used with CUDA C as a programming language.

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고조파 전류 제거를 위한 새로운 전류 보상 기법 (Novel Current Compensation Technique for Harmonic Current Elimination)

  • 정강률
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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    • pp.587-591
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    • 2004
  • This paper proposes a novel current compensation technique that can eliminate the harmonic currents included in line currents without computation of harmonic current components. A current controller with fast dynamics for an active filter is described. Harmonic currents are directly controlled without the need for sensing and computing the harmonic current of the load current, thus simplifying the control system. Current compensation is done in the time domain, allowing a fast time response. The DC voltage control loop keeps the voltage across the DC capacitor constant. High power factor control by an active filter is described. All control functions are implemented in software using a single-chip microcontroller, thus simplifying the control circuit. Any current-controlled synchronous rectifier can be used as a shunt active filter through only the simple modification of the software and the addition of current sensors. It is shown through experimental results that the proposed controller gives good performance for the shunt active filter.

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고속 탐색 방법에 의한 부호책 생성 알고리즘 (Codebook Generation Algorithm Using Fast Searching Method)

  • 김형철;조제황
    • 대한전자공학회논문지SP
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    • 제41권4호
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    • pp.63-67
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    • 2004
  • 고속 부호책 생성 방법들로서 기존의 대표적인 기법들에는 PDS, FNNS, 그리고 FC가 있다. 본 논문에서는 코드북을 설계하기 위해 기존의 방법들을 통합한 FCNNPDS를 제안한다. 모의실험 결과 FCNNPDS의 계산양이 기존의 방법들보다 약40-95% 감소되는 것을 보인다. 그러나, 비교 계산은 벡터의 차원 k와 관계가 없으며, 이것은 비교의 계산양이 다른 계산들보다 훨씬 적어지는 이유이다. 그래서 FCNNPDS는 기존의 방법들보다 가장 좋은 방법이다.

A TDOA Sign-Based Algorithm for Fast Sound Source Localization using an L-Shaped Microphone Array

  • Yiwere, Mariam;Rhee, Eun Joo
    • Journal of Information Technology Applications and Management
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    • 제23권3호
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    • pp.87-97
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    • 2016
  • This paper proposes a fast sound source localization method using a TDOA sign-based algorithm. We present an L-shaped microphone set-up which creates four major regions in the range of $0^{\circ}{\sim}360^{\circ}$ by the intersection of the positive and negative regions of the individual microphone pairs. Then, we make an initial source region prediction based on the signs of two TDOA estimates before computing the azimuth value. Also, we apply a threshold and angle comparison to tackle the existing front-back confusion problem. Our experimental results show that the proposed method is comparable in accuracy to previous three microphone array methods; however, it takes a shorter computation time because we compute only two TDOA values.

Parameter Estimation of Recurrent Neural Equalizers Using the Derivative-Free Kalman Filter

  • Kwon, Oh-Shin
    • Journal of information and communication convergence engineering
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    • 제8권3호
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    • pp.267-272
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    • 2010
  • For the last decade, recurrent neural networks (RNNs) have been commonly applied to communications channel equalization. The major problems of gradient-based learning techniques, employed to train recurrent neural networks are slow convergence rates and long training sequences. In high-speed communications system, short training symbols and fast convergence speed are essentially required. In this paper, the derivative-free Kalman filter, so called the unscented Kalman filter (UKF), for training a fully connected RNN is presented in a state-space formulation of the system. The main features of the proposed recurrent neural equalizer are fast convergence speed and good performance using relatively short training symbols without the derivative computation. Through experiments of nonlinear channel equalization, the performance of the RNN with a derivative-free Kalman filter is evaluated.

마이크로 컴퓨터에 의한 Fast Walsh Transform에 관한 연구 (Realization of Fast Walsh Transform by using a micro-computer)

  • 유상진;오민환;채영무;최승욱;안두수
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1989년도 하계종합학술대회 논문집
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    • pp.138-141
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    • 1989
  • In resent years, aided by the power and capability of digital computation, the techniques of Walsh Transform have been exploited for applications in commun- ication and signal processing. This paper presents an approach of FWT by using a 16- bit word-length micro- computer. This FWT implements an in-placed decimation-in-sequency algorithm which improves processing speed and memory storage. Several examples illustrate the process and demonstrate the power spectrum of FWT and that of FFT for the waveforms

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실시간 소프트웨어 GPS 수신기 구현 및 성능 분석 (Implementation of Real-Time Software GPS Receiver and Performance Analysis)

  • 곽희삼;고선준;원종훈;이자성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 하계학술대회 논문집 D
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    • pp.2350-2352
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    • 2004
  • This paper presents the implementation-tation of the real-time software GPS Receiver based on FFT and FLL assisted PLL tracking algorithm. The FFT(fast fourier transform) based GPS si-gnal acquisition scheme provides a fast TTFF(time to first fix) performance. The tracking based on FLL assisted PLL enables tracking of GPS signal in a high dynamic environment. The designed software GPS receiver uses the indexing method for generating replica carrier to reduce computation load. The performance of the implemented GPS receiver is evaluated using high-dynamic simulated data from a simulator and real static data.

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Fast Iterative Solving Method of Fuzzy Relational Equation and its Application to Image Compression/Reconstruction

  • Nobuhara, Hajime;Takama, Yasufumi;Hirota, Kaoru
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • 제2권1호
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    • pp.38-42
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    • 2002
  • A fast iterative solving method of fuzzy relational equation is proposed. It is derived by eliminating a redundant comparison process in the conventional iterative solving method (Pedrycz, 1983). The proposed method is applied to image reconstruction, and confirmed that the computation time is decreased to 1 / 40 with the compression rate of 0.0625. Furthermore, in order to make any initial solution converge on a reconstructed image with a good quality, a new cost function is proposed. Under the condition that the compression rate is 0.0625, it is confirmed that the root mean square error of the proposed method decreases to 27.34% and 86.27% compared with those of the conventional iterative method and a non iterative image reconstruction method, respectively.

Intermediate Scene Generation using Fast Bidirectional Disparity Morphing and Three Occluding Patterns

  • Kim, Dae-Hyun;Park, Jong-Soo
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -2
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    • pp.904-907
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    • 2002
  • In this paper, we describe an algorithm to automatically generate an intermediate scene using the bidirectional disparity morphing from the parallel stereopair. To compute the disparity between two reference images, we use the 2-step fast block matching algorithm that restricts the searching range and accelerates the speed of the computation of the disparity. We also define three occluding patterns so as to smooth the computed disparities, especially for occluded regions. They are derived from the peculiar properties of the disparity map. The smoothed disparity maps present that the false disparities are well corrected and the boundary between foreground and background becomes sharper. We discuss the advantages of this algorithm compared to the commonly used schemes and we show some experimental results with real data.

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Vector-radix 2차원 고속 DCT의 VLSI 어레이 구현 (A VLSI array implementation of vector-radix 2-D fast DCT)

  • 강용섬;전흥우;신경욱
    • 전자공학회논문지A
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    • 제32A권1호
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    • pp.234-243
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    • 1995
  • An arry circuit is designed for parallel computation of vector-radix 2-D discrete cosine transform (VR-FCT) which is a fast algorithm of DCT. By using a 2-D array of processing elements (PEs), the butterfly structure of the VR-FCT can be efficiently implemented with high condurrency and local communication geometry. The proposed implementation features architectural medularity, regularity and locality, so that it is very suitable for VLSI realization. Also, no transposition memory is required. The array core for (8$\times$8) 2-D DCT, which is designed usign ISRC 1.5.mu.m N-Well CMOS technology, consists of 64 PEs arranged in (8$\times$8) 2-D array and contains about 98,000 transistors on an area of 138mm$^{2}$. From simulation results, it is estimated that (8$\times$8) 2-D DCT can be computed in about 0.88 .mu.sec at 50 MHz clock frequency, resulting in the throughput rate of about 72${\times}10^[6}$ pixels per second.

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