• Korean Journal of Construction Engineering and Management
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• v.10 no.3
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• pp.102-110
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• 2009

Although several research efforts have been directed to fast-tracking to reduce the total delivery time, few researches have been studied on concurrent engineering in construction projects. The focus of fast-tracking is primarily on overlapping independent activity pairs. In comparison, the focus of concurrent engineering is on overlapping dependent activity pairs. Dependent activities are much harder to overlap successfully. This paper presents a simulation-based Concurrent Engineering methodology to optimize the overall duration of a set of design activities in a project by modelling key factors that determine the duration of individual activities and overlap between dependent activities. This methodology involves determining how much to overlap activities, how to decide which activities to overlap and the corresponding cost and time tradeoffs using a discrete event model solution. This simulation model, therefore, can be used as a reference on decision-making to define optimum point between time and cost.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1535-1544
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• 2017

Advances in FPGA technology have enabled fast real-time simulation of power converters, filters and loads. FPGA based HIL (Hardware-In-the-Loop) simulators have revolutionized control hardware and software development for power electronics. Common time step sizes in the order of 100ns are sufficient for simulating switching frequency current and voltage ripples. In order to keep the time step as small as possible, ideal switching function models are often used to simulate the phase legs. This often produces inferior results when simulating the discontinuous conduction mode (DCM) and disabled operational states. Therefore, the corresponding measurement and protection units cannot be tested properly. This paper describes a new solution for this problem utilizing a discrete-time PI controller. The PI controller simulates the proper DC and low frequency AC components of the phase leg voltage during disabled operation. It also retains the advantage of fast real-time execution of switch-based models when an accurate simulation of high frequency junction capacitor oscillations is not necessary.

• Journal of the Korea Society of Computer and Information
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• v.27 no.5
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• pp.101-107
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• 2022

Modeling and simulation is a technique used for operational verification, performance analysis, operational optimization, and prediction of target systems. Discrete Event System Specification (DEVS) of this representative technology defines models with a strict formalism and stratifies the structures between the models. When the atomic DEVS models operate with an intention different the target system, the simulation may lead to erroneous decision-making. However, most DEVS systems have the exclusion of the model test or provision of the manual test, so developers spend a lot of time verifying the atomic models. In this paper, we propose a script-based automated test system for accurate and fast validation of atomic models in Python-based DEVS. The proposed system uses both the existing method of manual testing and the new method of the script-based testing. As Experimental results in our system, the script-based test method was executed within 24 millisecond when the script was executed 10 times consecutively. Thus, the proposed system guarantees a fast verification time of the atomic models in our script-based test and improves the reusability of the test script.

• Journal of the Korean Chemical Society
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• v.42 no.1
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• pp.99-101
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• 1998

• Proceedings of the Korean Nuclear Society Conference
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• 2004.10a
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• pp.1149-1150
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• 2004

• Proceedings of the Korean Nuclear Society Conference
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• 1999.05a
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• pp.45-45
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• 1999

• 한국데이터정보과학회:학술대회논문집
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• 2001.10a
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• pp.87-97
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• 2001

We consider a stable tandem network which consists of two M/M/1 queues. The optimal changes of measure to run the fast simulation for the probability of rare events such as buffer overflows are obtained.

• Structural Engineering and Mechanics
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• v.53 no.4
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• pp.745-765
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• 2015

A nonlinear Finite Element (FE) algorithm is proposed to analyze the Reinforced Concrete (RC) columns subjected to Cyclic Loading (CL), Cyclic Oriented Lateral Force and Axial Loading (COLFAL), Monotonic Loading (ML) or Oriented Pushover Force and Axial Loading (OPFAL) in any direction. In the proposed algorithm, the following parameters are considered: uniaxial behavior of concrete and steel elements, the pseudo-plastic hinge produced in the critical sections, and global behavior of RC columns. In the proposed numerical simulation, the column is discretized into two Macro-Elements (ME) located between the pseudo-plastic hinges at critical sections and the inflection point. The critical sections are discretized into Fixed Rectangular Finite Elements (FRFE) in general cases of CL, COLFAL or ML and are discretized into Variable Oblique Finite Elements (VOFE) in the particular cases of ML or OPFAL. For pushover particular case, a fairly fast converging and properly accurate nonlinear simulation method is proposed to assess the behavior of RC columns. The proposed algorithm has been validated by the results of tests carried out on full-scale RC columns.

• 한국초전도학회:학술대회논문집
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• v.9
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• pp.238-241
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• 1999

Analog-to-digital converter has attracted a lot of interests as one of the most prospective area of an application of Josephson Junction technology. Recently, the development of a digital-to-analog converter has been pursued to achieved the high performance. One of the main advantage in using single flux quantum logic in a digital-to-analog converter is the low voltage drop in a single Josephson Junction and hence the resolution of the output voltage of this digital-to-analog converter can be very high. In this work, we have used a software, called WRspice, to study a voltage multiplier circuit which is the basic block in building a digital-to-analog circuit. In simulation, we operated a voltage multiplier with .4 Josephson Junctions per stage and studied the dependence on the circuit bias currents and the circuit inductors of the voltage multiplier. Our simulation results showed a fast operation and reasonable circuit margins.

• Journal of the Korea Society for Simulation
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• v.4 no.1
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• pp.59-73
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• 1995

Local area networks(LANs) recently become so large that they exceed their architected limits and users on different LANs may need to talk each other. This trend has led to a growth in the practice of interconnecting many heterogeneous LANs. In this paper, we proposed a method to interconnect Ethernets and token rings, which are widely used today, through a fast FDDI network. We also developed a simulation tool to evaluate the performances of the interconnected networks. We used a simulation language SLAM II for modeling and OSF/MOTIF X-window for user interface. The developed tool can be used to make a decision which interconnecting method is suitable for a given environment before interconnecting many heterogeneous LANs.