• Title/Summary/Keyword: Fast Fourier transform (FFT)

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A Low-Complexity 128-Point Mixed-Radix FFT Processor for MB-OFDM UWB Systems

  • Cho, Sang-In;Kang, Kyu-Min
    • ETRI Journal
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    • v.32 no.1
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    • pp.1-10
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    • 2010
  • In this paper, we present a fast Fourier transform (FFT) processor with four parallel data paths for multiband orthogonal frequency-division multiplexing ultra-wideband systems. The proposed 128-point FFT processor employs both a modified radix-$2^4$ algorithm and a radix-$2^3$ algorithm to significantly reduce the numbers of complex constant multipliers and complex booth multipliers. It also employs substructure-sharing multiplication units instead of constant multipliers to efficiently conduct multiplication operations with only addition and shift operations. The proposed FFT processor is implemented and tested using 0.18 ${\mu}m$ CMOS technology with a supply voltage of 1.8 V. The hardware- efficient 128-point FFT processor with four data streams can support a data processing rate of up to 1 Gsample/s while consuming 112 mW. The implementation results show that the proposed 128-point mixed-radix FFT architecture significantly reduces the hardware cost and power consumption in comparison to existing 128-point FFT architectures.

Current to Voltage Converter for Low power OFDM modem (저전력 OFDM 모뎀 구현을 위한 IVC설계)

  • Kim, Seong-Kweon
    • The Journal of the Korea institute of electronic communication sciences
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    • v.3 no.2
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    • pp.86-92
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    • 2008
  • Othogonal Frequency Division Multiplexing(OFDM) has been taken notice of 4th generation communication method because it has a merit of high data rate(HDR). To realize HDR communication, The OFDM a s high efficient Fast-Fourier-Transform (FFT)/Inversion FFT (IFFT) processor. Currently OFDM is realized by Digital Signal Processor(DSP) but it consumes a lot of Power. Therefore, current-mode FFT LSI has been proposed for compensation of this demerit. In this paper, we propose IVC for current-mode FFT LSI. From the simulation result, the output value of IVC is more than 3V when the value of FFT Block output is more than $7.35{\mu}A$. The output value of IVC is lower than 0.5V when the value of FFT Block output is lower than $0.97{\mu}A$. Designed IVC Low-power Current mode FFT LSI will contribute to the operation of current-mode FFT LSI and the development of next generation wireless communication systems.

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Thermal Analysis of Automotive Disc Brake Using FFT-FEM (FFT-FEM을 이용한 자동차용 디스크 브레이크의 열 해석)

  • Choi, Ji-Hoon;Kim, Do-Hyung;Lee, In
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.25 no.8
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    • pp.1253-1260
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    • 2001
  • Transient thermal analysis of a three-dimensional axisymmetric automotive disk brake is presented in this paper. Temperature fields are obtained using a hybrid FFT-FEM scheme that combines Fourier transform techniques and finite element method. The use of a fast Fourier transform algorithm can avoid singularity problems and lead to inexpensive computing time. The transformed problem is solved with finite element scheme for each frequency domain. Inverse transforms are then performed for time domain solution. Numerical examples are presented for validation tests. Comparisons with analytical results show very good agreement. Also, a 3-D simulation, based upon an automotive brake disk model is performed.

Design and Performance Analysis of Zoom-FFT Based FMCW Radar Level Meter (Zoom-FFT 기반 FMCW 레이더 레벨미터의 설계 및 성능분석)

  • Sanjeewa, Nuwan;Kim, Won-Ho
    • Journal of Satellite, Information and Communications
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    • v.9 no.2
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    • pp.38-44
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    • 2014
  • This paper presents design of a FMCW (Frequency Modulated Continuous Wave) level meter as well as simulation result of the designed system. The system is designed to measure maximum range of 20m since FMCW radar can be used for measuring short range distance. The distance is measured by analyzing the beat signal which is generated as result of mixing transmitting signal with the reflected received signal. The Fast Fourier Transform is applied to analyze the beat signal for calculating the displacement and Zoom FFT technique is used to minimize measurement error as well as increase the resolution of the measurement. The resolution of the measurement of the designed system in this paper is 2.2mm and bandwidth of 1.024GHz is used for simulation. Thus the simulation results are analyzed and compared in various conditions in order to get a comprehensive idea of frequency resolution and displacement resolution.

Watermarking using Fast Fourier Transform and Gram-Schmidt Orthogonalization (FFT와 그람-슈미트 정규직교화를 이용한 워터마킹)

  • Cha, Sun-Hee;Yoon, Hee-Joo;Cha, Eui-Young
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.07b
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    • pp.808-810
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    • 2005
  • 분 논문에서는 워터마크가 삽입된 영상의 비가시성과 강인성을 보장하기 위하여 주파수 영역 기반인 FFT(Fast Fourier Transform)을 이용하였다. 그리고 영상에 삽입된 워터마크를 정확하게 추출하기 위하여 워터마크에 삽입하는 키 사이의 직교성을 유지할 수 있는 그람-슈미트 정규직교화를 이용하였다. 실험을 통해 살펴본 결과 영상의 특징에 관계없이 랜덤계열에 민감한 워터마크를 추출할 수 있는 정확성 및 신뢰성을 가짐을 알 수 있었다.

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High-throughput Low-complexity Mixed-radix FFT Processor using a Dual-path Shared Complex Constant Multiplier

  • Nguyen, Tram Thi Bao;Lee, Hanho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.101-109
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    • 2017
  • This paper presents a high-throughput low-complexity 512-point eight-parallel mixed-radix multipath delay feedback (MDF) fast Fourier transform (FFT) processor architecture for orthogonal frequency division multiplexing (OFDM) applications. To decrease the number of twiddle factor (TF) multiplications, a mixed-radix $2^4/2^3$ FFT algorithm is adopted. Moreover, a dual-path shared canonical signed digit (CSD) complex constant multiplier using a multi-layer scheme is proposed for reducing the hardware complexity of the TF multiplication. The proposed FFT processor is implemented using TSMC 90-nm CMOS technology. The synthesis results demonstrate that the proposed FFT processor can lead to a 16% reduction in hardware complexity and higher throughput compared to conventional architectures.

MB-OFDM UWB modem SoC design (MB-OFDM 방식 UWB 모뎀의 SoC칩 설계)

  • Kim, Do-Hoon;Lee, Hyeon-Seok;Cho, Jin-Woong;Seo, Kyeung-Hak
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.8C
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    • pp.806-813
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    • 2009
  • This paper presents a modem chip design for high-speed wireless communications. Among the high-speed communication technologies, we design the UWB (Ultra-Wideband) modem SoC (System-on-Chip) Chip based on a MB-OFDM scheme which uses wide frequency band and gives low frequency interference to other communication services. The baseband system of the modem SoC chip is designed according to the standard document published by WiMedia. The SoC chip consists of FFT/IFFT (Fast Fourier Transform/Inverse Fast Fourier Transform), transmitter, receiver, symbol synchronizer, frequency offset estimator, Viterbi decoder, and other receiving parts. The chip is designed using 90nm CMOS (Complementary Metal-Oxide-Semiconductor) procedure. The chip size is about 5mm x 5mm and was fab-out in July 20th, 2009.

Low-power Butterfly Structure for DIT Radix-4 FFT Implementation (DIT Radix-4 FFT 구현을 위한 저전력 Butterfly 구조)

  • Jang, Young-Beom;Lee, Sang-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.12
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    • pp.1145-1147
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    • 2013
  • There are two FFT(Fast Fourier Transform) algorithms, which are DIT(Decimation-In-Time) and DIF(Decimation-In- Frequency). Even the DIF algorithm is more widely used because of its various implementation architectures, the DIT structures have not been investigated. In this paper, the DIT Radix-4 algorithm is derived and its efficient butterfly structure is proposed for SoC(System on a Chip) implementation.

Prediction of Frictional behavior according to geometrical contact condition using FFT-based analysis (FFT해석을 이용한 기하학적 접촉조건에 따른 마찰거동예측)

  • 성인하;이형석;김대은
    • Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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    • 2001.11a
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    • pp.13-18
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    • 2001
  • In this paper, FFT(Fast Fourier Transform) analysis of friction was suggested as a method to interpret the contact conditions. Micro-grooves with various dimensions were fabricated on the silicon surface to investigate the frictional behavior with respect to the change in geometrical contact condition. Frictional forces between micro-grooved surfaces and spheres modeled as surface asperities were measured using a micro-tribotester which was built inside a SEM(Scanning Electron Microscope). The experimental results show that the relative dimensions and distributions of contact asperities between two surfaces can be predicted by the power spectrum and the main frequency in FFT-based analysis of friction coefficient. Also, it was shown that the friction coefficient for multi-asperities was the result of the superposition of that for each asperity.

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An Unsupervised Clustering Technique of XML Documents based on Function Transform and FFT (함수 변환과 FFT에 기반한 조정자가 없는 XML 문서 클러스터링 기법)

  • Lee, Ho-Suk
    • The KIPS Transactions:PartD
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    • v.14D no.2
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    • pp.169-180
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    • 2007
  • This paper discusses a new unsupervised XML document clustering technique based on the function transform and FFT(Fast Fourier Transform). An XML document is transformed into a discrete function based on the hierarchical nesting structure of the elements. The discrete function is, then, transformed into vectors using FFT. The vectors of two documents are compared using a weighted Euclidean distance metric. If the comparison is lower than the pre specified threshold, the two documents are considered similar in the structure and are grouped into the same cluster. XML clustering can be useful for the storage and searching of XML documents. The experiments were conducted with 800 synthetic documents and also with 520 real documents. The experiments showed that the function transform and FFT are effective for the incremental and unsupervised clustering of XML documents similar in structure.