[KSCI] Korea Science Citation Index Service

http://dx.doi.org/10.5573/JSTS.2017.17.1.101

High-throughput Low-complexity Mixed-radix FFT Processor using a Dual-path Shared Complex Constant Multiplier

Nguyen, Tram Thi Bao (Dept. of Information and Communication Engr. Inha University)
Lee, Hanho (Dept. of Information and Communication Engr. Inha University)

Publication Information

JSTS:Journal of Semiconductor Technology and Science / v.17, no.1, 2017 , pp. 101-109 More about this Journal

Abstract

This paper presents a high-throughput low-complexity 512-point eight-parallel mixed-radix multipath delay feedback (MDF) fast Fourier transform (FFT) processor architecture for orthogonal frequency division multiplexing (OFDM) applications. To decrease the number of twiddle factor (TF) multiplications, a mixed-radix $2^4/2^3$ FFT algorithm is adopted. Moreover, a dual-path shared canonical signed digit (CSD) complex constant multiplier using a multi-layer scheme is proposed for reducing the hardware complexity of the TF multiplication. The proposed FFT processor is implemented using TSMC 90-nm CMOS technology. The synthesis results demonstrate that the proposed FFT processor can lead to a 16% reduction in hardware complexity and higher throughput compared to conventional architectures.

Keywords

Fast Fourier transform (FFT); mixed-radix; multipath delay feedback (MDF); dual-path; complex constant multiplier; orthogonal frequency division multiplexing (OFDM);

Citations & Related Records

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