• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.396-396
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• 2013

The resistive random access memory (ReRAM) has several advantages to apply next generation non-volatile memory device, because of fast switching time, long retentions, and large memory windows. The high mobility of monolayered graphene showed several possibilities for scale down and electrical property enhancement of memory device. In this study, the monolayered graphene grown by chemical vapor deposition was transferred to $SiO_2$ (100 nm)/Si substrate and glass by using PMMA coating method. For formation of metal-oxide nanoparticles, we used a chemical reaction between metal films and polyamic acid layer. The 50-nm thick BPDA-PDA polyamic acid layer was coated on the graphene layer. Through soft baking at $125^{\circ}C$ or 30 min, solvent in polyimide layer was removed. Then, 5-nm-thick indium layer was deposited by using thermal evaporator at room temperature. And then, the second polyimide layer was coated on the indium thin film. After remove solvent and open bottom graphene layer, the samples were annealed at $400^{\circ}C$ or 1 hr by using furnace in $N_2$ ambient. The average diameter and density of nanoparticle were depending on annealing temperature and times. During annealing process, the metal and oxygen ions combined to create $In_2O_3$ nanoparticle in the polyimide layer. The electrical properties of $In_2O_3$ nanoparticle ReRAM such as current-voltage curve, operation speed and retention discussed for applictions of transparent and flexible hybrid ReRAM device.

• 한국정보통신학회논문지
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• 제11권11호
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• pp.2158-2165
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• 2007

본 논문에서는 비선형 블라인드 채널등화기의 구현을 위하여 가우시안 가중치(gaussian weights)를 이용한 개선된 퍼지 클러스터(Modified Fuzzy C-Means with Gaussian Weights: MFCM_GW) 알고리즘을 제안한다. 제안된 알고리즘은 기존 FCM 알고리즘의 유클리디언 거리(Euclidean distance) 값 대신 Bayesian Likelihood 목적 함수(fitness function)와 가우시안 가중치가 적용된 멤버십 매트릭스(partition matrix)를 이용하여, 비선형 채널의 출력으로 수신된 데이터들로부터 최적의 채널 출력 상태 값(optimal channel output states)들을 직접 추정한다. 이렇게 추정된 채널 출력 상태 값들로 비선형 채널의 이상적 채널 상태(desired channel states) 백터들을 구성하고, 이를 Radial Basis Function(RBF) 등화기의 중심(center)으로 활용함으로써 송신된 데이터 심볼을 찾아낸다. 실험에서는 무작위 이진 신호에 가우시안 잡음이 추가된 데이터를 사용하여 기존의 Simplex Genetic Algorithm(GA), 하이브리드 형태의 GASA(GA merged with simulated annealing(SA)), 그리고 과거에 발표되었던 MFCM 등과 그 성능을 비교 분석하였으며, 가우시안 가중치가 적용된 MFCM_GW를 이용한 채널등화기가 상대적으로 정확도와 속도 면에서 우수함을 보였다.

• 한국초전도ㆍ저온공학회논문지
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• 제9권1호
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• pp.1-4
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• 2007

The total Fluorine content in the precursor solution for MOD processing of YBCO coated conductors can be significantly reduced by synthesizing precursor solution with F-free Y & Cu precursor and Barium trifluoroacetate(TFA). It was shown that crack-free and uniform precursor films were formed after calcinations in humidified oxygen atmosphere. Less than 2 hours are required to finish the calcinations process and XRD measurement shows that $BaF_2,\;CuO,\;Y_2O_3$ are major constituent of calcined precursor films. Film thickness after calcinations was improved to be 2.8um by applying slot-die coating method. In particular, addition of Samarium shows critical current of $I_c=273A/cm-w(J_c=3.8MA/cm^2)$. It is shown that uniform and fast processing route to YBCO coated conductor with high Ic can be provided by employing F-free Y & Cu precursor solution in MOD process.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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• pp.844-847
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• 1997

In this paper, scheduling problem is dealt for the minimization of due date penalty for the customer order. Multiproduct batch processes have been dealt with for their suitability for high value added low volume products. Their scheduling problems take minimization of process operation for objective function, which is not enough to meet the customer satisfaction and the process efficiency simultaneously because of increasing requirement of fast adaptation for rapid changing market condition. So new target function has been suggested by other researches to meet two goals. Penalty function minimization is one of them. To present more precisely production scheduling, we develop new scheduling model with penalty function of earliness and tardiness We can find many real cases that penalty parameters are divergent by the difference between the completion time of operation and due date. That is to say, the penalty parameter values for the product change by the customer demand condition. If the order charges different value for due date, we can solve it with the due date period. The period means the time scope where penalty parameter value is 0. If we make use of the due date period, the optimal sequence of our model is not always same with that of fixed due date point. And if every product have due date period, due date of them are overlapped which needs optimization for the maximum profit and minimum penalty. Due date period extension can be enlarged to makespan minimization if every product has the same abundant due date period and same penalty parameter. We solve this new scheduling model by simulated annealing method. We also develop the program, which can calculate the optimal sequence and display the Gantt chart showing the unit progress and time allocation only with processing data.

• 한국재료학회지
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• 제11권5호
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• pp.427-430
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• 2001

절연 특성이 기존의 SiO$_2$ 보다 우수한 500 두께의 SiN$_4$층을 두 단결정 실리콘사이의 절연막질로 채택하고 직접접합시켜 직경 10cm의 Si(100) /500 -Si$_3$N$_4$/Si (100) 기판쌍을 제조하였다. p-type (100) 실리콘기판을 친수성, 소수성을 갖도록 습식방법으로 세척한 두 그룹의 시편들을 준비하였다. 기판전면에 LPCVD로 500 $\AA$ 두께의 Si$_3$N$_4$∥Si(100) 기판을 성장시키고 실리론 기판과 고청정상태에서 가접시킨 후, 선형열원의 이동속도를 0.1mm/s로 고정시키고 선형 입열량을 400~1125w 범위에서 변화시키면서 직접접합을 실시하였다. 접합된 기판은 적외선 카메라로 계면 접합면적을 확인하고 razor blade creek opening 측정법으로 세정 방법에 따른 각 기판쌍 그들의 접합강도를 확인하였다. 접합강도가 측정된 기판쌍은 high resolution transmission electron microscopy (HRTEM )을 사용하여 수직단면 미세구조를 조사하였다. 입열량의 증가에 따라 두 그를 모두 접합율은 큰 유의차 없이 765% 정도로, 소수성 처리가 된 기판쌍의 접합강도는 1577mJ/$m^2$가지 선형적으로 증가하였으나, 친수성 처리가 된 기판쌍은 주어진 실험 범위에서 입열량의 증가에 따라 큰 변화 없이 2000mj/$m^2$이상의 접합 강도를 보였다 친수성 처리가 된 기판쌍의 수직단면 미세구조를 고분해능 투과전자현미경으로 각인한 결과 모든 시편의 실리콘과 Si$_3$N$_4$사이에 25 $\AA$ 정도의 SiO$_2$ 자연산화막이 존재하여 중간충 역할을 함으로서 기판접합강도를 향상시키는 것으로 판단되었다.

• 한국재료학회지
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• 제19권2호
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• pp.61-67
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• 2009

Electrolessly deposited Co (Re,P) was investigated as a possible capping layer for Cu wires. 50 nm Co (Re,P) films were deposited on Cu/Ti-coated silicon wafers which acted as a catalytic seed and an adhesion layer, respectively. To obtain the optimized bath composition, electroless deposition was studied through an electrochemical approach via a linear sweep voltammetry analysis. The results of using this method showed that the best deposition conditions were a $CoSO_4$ concentration of 0.082 mol/l, a solution pH of 9, a $KReO_4$ concentration of 0.0003 mol/l and sodium hypophosphite concentration of 0.1 mol/L at $80^{\circ}C$. The thermal stability of the Co (Re,P) layer as a barrier preventing Cu was evaluated using Auger electron spectroscopy and a Scanning calorimeter. The measurement results showed that Re impurities stabilized the h.c.p. phase up to $550^{\circ}C$ and that the Co (Re,P) film efficiently blocked Cu diffusion under an annealing temperature of $400^{\circ}C$ for 1hr. The good barrier properties that were observed can be explained by the nano-sized grains along with the blocking effect of the impurities at the fast diffusion path of the grain boundaries. The transformation temperature from the amorphous to crystal structure is increased by doping the Re.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2018년도 춘계학술대회 논문집
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• pp.140-140
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• 2018

The 3D interconnect technologies have been appeared, as the density of Integrated Circuit (IC) devices increases. Through Silicon Via (TSV) process is an important technology in the 3D interconnect technologies. And the process is used to form a vertically electrical connection through silicon dies. This TSV process has some advantages that short length of interconnection, high interconnection density, low electrical resistance, and low power consumption. Because of these advantages, TSVs could improve the device performance higher. The fabrication process of TSV has several steps such as TSV etching, insulator deposition, seed layer deposition, metallization, planarization, and assembly. Among them, TSV metallization (i.e. TSV filling) was core process in the fabrication process of TSV because TSV metallization determines the performance and reliability of the TSV interconnect. TSVs were commonly filled with metals by using the simple electrochemical deposition method. However, since the aspect ratio of TSVs was become a higher, it was easy to occur voids and copper filling of TSVs became more difficult. Using some additives like an accelerator, suppressor and leveler for the void-free filling of TSVs, deposition rate of bottom could be fast whereas deposition of side walls could be inhibited. The suppressor was adsorbed surface of via easily because of its higher molecular weight than the accelerator. However, for high aspect ratio TSV fillers, the growth of the top of via can be accelerated because the suppressor is replaced by an accelerator. The substitution of the accelerator and the suppressor caused the side wall growth and defect generation. The suppressor was used as Single additive electrodeposition of TSV to overcome the constraints. At the electrochemical deposition of high aspect ratio of TSVs, the suppressor as single additive could effectively suppress the growth of the top surface and the void-free bottom-up filling became possible. Generally, copper was used to fill TSVs since its low resistivity could reduce the RC delay of the interconnection. However, because of the large Coefficients of Thermal Expansion (CTE) mismatch between silicon and copper, stress was induced to the silicon around the TSVs at the annealing process. The Keep Out Zone (KOZ), the stressed area in the silicon, could affect carrier mobility and could cause degradation of the device performance. Cobalt can be used as an alternative material because the CTE of cobalt was lower than that of copper. Therefore, using cobalt could reduce KOZ and improve device performance. In this study, high-aspect ratio TSVs were filled with cobalt using the electrochemical deposition. And the filling performance was enhanced by using the suppressor as single additive. Electrochemical analysis explains the effect of suppressor in the cobalt filling bath and the effect of filling behavior at condition such as current type was investigated.

• 청정기술
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• 제25권4호
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• pp.316-323
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• 2019

대기 오염 물질 저감과 연소 효율 증가를 위해서 연소 환경 내 일산화탄소를 정밀하게 측정하는 것은 필수적인 요소이다. 일산화탄소(carbon monoxide, CO)는 불완전 연소 때 급격히 증가하며 질소산화물(nitrogen oxide, NOx)과 Trade-off 관계로 오염 물질 배출량과 불완전 연소 반응에 기여하는 중요한 가스종이다. 특히, 대형 연소 시스템 중 열처리로의 경우, 강판 표면위 산화층 형성을 억제하기 위해 과잉 연료 조건에서 환원 분위기로 운전이 진행된다. 이는 많은 양의 미연분 일산화탄소가 배출되는 원인이기도 하다. 하지만 연소 환경 내에서 일산화탄소 농도는 불균일한 연소 반응과 열악한 측정 환경으로 인하여 실시간 측정이 어렵다. 이러한 문제점을 극복하기 위해서 광학적 측정 방식인 파장 가변형 다이오드 레이저 흡수 분광법(tunable diode laser absorption spectroscopy, TDLAS)이 각광을 받고 있다. TDLAS 기법은 열악한 현장 측정, 빠른 응답성, 비접촉식 방식으로 연소 환경 내 특정 가스종 농도 측정에 적합하다. 본 연구는 과잉 연료 조건에서 당량비 제어를 위한 연소시스템을 제작하였으며 연소 배기가스 생성을 위해 LPG/공기 화염을 이용하였다. 당량비 변화에 따른 CO 농도 측정은 TDLAS와 Voigt 함수 기반 시뮬레이션으로 분석하였다. 또한 연소 생성물로부터 간섭이 없는 CO 광 흡수 영역 확보를 위해 근적외선 영역의 4300.6 cm^-1을 선택하여 실험을 진행하였다.