• 제목/요약/키워드: Fabrication cost

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A Simulated Study of Silicon Solar Cell Power Output as a Function of Minority-Carrier Recombination Lifetime and Substrate Thickness

  • Choe, Kwang Su
    • 한국재료학회지
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    • 제25권9호
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    • pp.487-491
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    • 2015
  • In photovoltaic power generation where minority carrier generation via light absorption is competing against minority carrier recombination, the substrate thickness and material quality are interdependent, and appropriate combination of the two variables is important in obtaining the maximum output power generation. Medici, a two-dimensional semiconductor device simulation tool, is used to investigate the interdependency in relation to the maximum power output in front-lit Si solar cells. Qualitatively, the results indicate that a high quality substrate must be thick and that a low quality substrate must be thin in order to achieve the maximum power generation in the respective materials. The dividing point is $70{\mu}m/5{\times}10^{-6}sec$. That is, for materials with a minority carrier recombination lifetime longer than $5{\times}10^{-6}sec$, the substrate must be thicker than $70{\mu}m$, while for materials with a lifetime shorter than $5{\times}10^{-6}sec$, the substrate must be thinner than $70{\mu}m$. In substrate fabrication, the thinner the wafer, the lower the cost of material, but the higher the cost of wafer fabrication. Thus, the optimum thickness/lifetime combinations are defined in this study along with the substrate cost considerations as part of the factors to be considered in material selection.

Optimization of the fabrication process using nanostructured carbon for low-cost FED application

  • Sun, Z.;Wang, L.L.;Chen, T.;Zhang, Z.J.;Cao, Z.Y.;Chen, Y.W.;Pan, L.K.;Feng, T.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.274-277
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    • 2006
  • Nanostructured carbon (nm-C), including carbon nanotubes and nanofibers (CNTs/CNFs) is promising for low-cost field emission display (FED) application. By modification of CNTs/CNFs, uniform CNTs/CNFs can be obtained and used for field emission cathode (FEC) on glass substrate. By screen-printing (SP) and electrophoretic deposition (EPD) process, large area FEC can be obtained. The FED properties are studied and compared. Both SP and EPD FEC show excellent field emission properties, such as low emission field and uniform emission, after optimization the fabrication process. While EPD FEC exhibits better luminescence image. By vacuum sealing, the low cost nm-C-FED prototypes based on EPD cathode have been demonstrated.

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산화물 전구체 MOD공정에 의한 YBCO coated conductor제조 (Fabrication of YBCO coated conductor using oxide precursor-based MOD processing)

  • 김영국;유재무;고재웅;정국채;김영준;한봉수
    • 한국초전도ㆍ저온공학회논문지
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    • 제7권1호
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    • pp.5-8
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    • 2005
  • MOD Process using metal acetates or trifluoroacetates has been considered to be a strong candidate for a low cost fabrication process for coated conductor with high $J_e$. Recently, an economical MOI) process has been developed for coated conductor with high $J_c$ using low cost starting materials such as YBCO powders. YBCO thin films prepared by single coating on LAO substrate with this modified oxide-precursor solution gives transport $I_c$ of 100A/cm-w and the $J_c$ value of $2.9MA/cm^{2}$ (77K, Self-field). The YBCO coated conductor prepared by single coating with $CeO_2/IBAD-YSZ/SS$ tape gives transport $I_c$ of 50A/cm-w in 2cm. Characterization with XRD, SEM shows that the YBCO layers were epitaxially grown and exhibit well-developed dense micro-structures. This newly developed oxide-precursor based MOD process will provide a low cost route to coated conductor with high $J_c$.

다중 공정변수를 활용한 저비용 PUF 보안 Chip의 제작 (Fabrication of Low-Cost Physically Unclonable Function (PUF) Chip Using Multiple Process Variables)

  • 지홍석;손돌;연주원;길태현;박효준;윤의철;이문권;박준영
    • 한국전기전자재료학회논문지
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    • 제37권5호
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    • pp.527-532
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    • 2024
  • Physically Unclonable Functions (PUFs) provide a high level of security for private keys using unique physical characteristics of hardware. However, fabricating PUF chips requires numerous semiconductor processes, leading to high costs, which limits their applications. In this work, we introduce a low-cost manufacturing method for PUF security chips. First, surface roughening through wet-etching is utilized to create random variables. Additionally, physical vapor deposition is added to further enhance randomness. After PUF chip fabrication, both Hamming distance (HD) and Hamming weight (HW) are extracted and compared to verify the fabricated chip. It is confirmed that the PUF chip using two different multiple process variables demonstrates superior uniqueness and uniformity compared to the PUF security chip fabricated using only a single process variable.

Feasibility study on the wide and long 9%Ni steel plate for use in the LNG storage inner tank shell

  • Chung, Myungjin;Kim, Jongmin;Kim, Jin-Kook
    • Steel and Composite Structures
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    • 제32권5호
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    • pp.571-582
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    • 2019
  • This study aimed to assess the feasibility on the wide and long 9%Ni steel plate for use in the LNG storage inner tank shell. First, 5-m-wide and 15-m-long 9%Ni steel plates were test manufactured from a steel mill and specimens taken from the plates were tested for strength, toughness, and flatness to verify their performance based on international standards and design specifications. Second, plates with a thickness of 10 mm and 25 mm, a width of 4.8~5.0 m, and a length of 15 m were test fabricated by subjecting to pretreatment, beveling, and roll bending resulting in a final width of 4.5~4.8 m and a length of 14.8m with fabrication errors identical to conventional plates. Third, welded specimens obtained via shield metal arc welding used for vertical welding of inner tank shell and submerged arc welding used for horizontal welding were also tested for strength, toughness and ductility. Fourth, verification of shell plate material and fabrication was followed by test erection using two 25-mm-thick, 4.5-m-wide and 14.8-m-long 9%Ni steel plates. No undesirable welding failure or deformation was found. Finally, parametric design using wide and long 9%Ni steel plates was carried out, and a simplified design method to determine the plate thickness along the shell height was proposed. The cost analysis based on the parametric design resulted in about 2% increase of steel weight; however, the construction cost was reduced about 6% due to large reduction in welding work.

On the fabrication of carbon fabric reinforced epoxy composite shell without joints and wrinkling

  • Vasanthanathan, A.;Nagaraj, P.;Muruganantham, B.
    • Steel and Composite Structures
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    • 제15권3호
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    • pp.267-279
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    • 2013
  • This article describes a simple and cost effective fabrication procedure by using hand lay-up technique that is employed for the manufacturing of thin-walled axi-symmetric composite shell structures with carbon, glass and hybrid woven fabric composite materials. The hand lay-up technique is very commonly used in aerospace and marine industries for making the complicated shell structures. A generic fabrication procedure is presented in this paper aimed at manufacture of plain Carbon Fabric Reinforced Plastic (CFRP) and Glass Fabric Reinforced Plastic (GFRP) shells using hand lay-up process. This paper delivers a technical breakthrough in fabrication of composite shell structures without any joints and wrinkling. The manufacture of stiffened CFRP shells, laminated CFRP shells and hybrid (carbon/glass/epoxy) composite shells which are valued by the aerospace industry for their high strength-to-weight ratio under axial loading have also been addressed in this paper. A fabrication process document which describes the major processing steps of the composite shell manufacturing process has been presented in this paper. A study of microstructure of the glass fabric/epoxy composite, carbon fabric/epoxy composite and hybrid carbon/glass/fabric epoxy composites using Scanning Electron Microscope (SEM) has been also carried out in this paper.

Direct 반송방식에 기반을 둔 300mm FAB Line 시뮬레이션 (Direct Carrier System Based 300mm FAB Line Simulation)

  • 이홍순;한영신;이칠기
    • 한국시뮬레이션학회논문지
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    • 제15권2호
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    • pp.51-57
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    • 2006
  • 현재 반도체 산업은 200mm 웨이퍼에서 300mm 웨이퍼 공정으로 기술이 변화하고 있다. 300mm 웨이퍼 제조업체들은 Fabrication Line (FAB Line) 자동화를 비용절감 실현의 방책으로 사용하고 있다. 또한 기술의 확산, 시장 경쟁력의 격화 등으로 생산성 향상에 의한 원가절감이 반도체 산업 성장의 근본요인이 되고 있다. 대부분의 반도체 업체들은 생산성을 높이기 위해 average cycle time을 줄이는데 총력을 기울이고 있다. 본 논문에서는 average cycle time을 줄이는 데 중점을 두고, 300mm 반도체 제조공정을 시뮬레이션 하였다.

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초고층 건물 공기단축을 위한 기둥철근 3개층 선조립공법에 관한 연구 (A Study on the Pre-fabrication of Three-story Column Re-bars for Saving Construction Time of High-rise Buildings)

  • 김광희;김재엽;서덕석;안성훈;최희복;정병원
    • KIEAE Journal
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    • 제7권2호
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    • pp.39-46
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    • 2007
  • A high-rise building construction in Korea has some problems in engineering, construction and management technologies although the high-rise building construction is recently booming. In addition, the lack of skilled construction labors is increasing, so the development for methods is needed to reduce the labors by prefabrication and mechanization. A re-bar work is one of very important works with regard to cost and schedule management in the high-rise building construction. Nevertheless, the re-bar work has some problems that it is needed many re-bars for joints linking and much time for lifting due to high-rise buildings, and it is difficult to level the skill of labors. So, in this study, the pre-fabrication of three-story height in column re-bars is proposed and the results of an implementation are analyzed and explored by a case study. As the results of case study, the pre-fabrication of three-story heights in column re-bars could reduce the cost in the re-bar work and accelerate the time in the structural frame work. In addition, the pre-fabrication of three-story height in column re-bars could solve the problems such as the waste of many re-bars for joints linking, and the lack of the skilled labors.

The effect of film morphology by bar-coating process for large area perovskite solar modules

  • Ju, Yeonkyeong;Kim, Byeong Jo;Lee, Sang Myeong;Yoon, Jungjin;Jung, Hyun Suk
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.416-416
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    • 2016
  • Organic-inorganic metal halide perovskite solar cells have received attention because it has a number of advantages with excellent light harvesting, high carrier mobility, and facile solution processability and also recorded recently power conversion efficiency (PCEs) of over 20%. The major issue on perovskite solar cells have been reached the limit of small area laboratory scale devices produced using fabrication techniques such as spin coating and physical vapor deposition which are incompatible with low-cost and large area fabrication of perovskite solar cells using printing and coating techniques. To solution these problems, we have investigated the feasibility of achieving fully printable perovskite solar cells by the blade-coating technique. The blade-coating fabrication has been widely used to fabricate organic solar cells (OSCs) and is proven to be a simple, environment-friendly, and low-cost method for the solution-processed photovoltaic. Moreover, the film morphology control in the blade-coating method is much easier than the spray coating and roll-to-roll printing; high-quality photoactive layers with controllable thickness can be performed by using a precisely polished blade with low surface roughness and coating gap control between blade and coating substrate[1]. In order to fabricate perovskite devices with good efficiency, one of the main factors in printed electronic processing is the fabrication of thin films with controlled morphology, high surface coverage and minimum pinholes for high performance, printed thin film perovskite solar cells. Charge dissociation efficiency, charge transport and diffusion length of charge species are dependent on the crystallinity of the film [2]. We fabricated the printed perovskite solar cells with large area and flexible by the bar-coating. The morphology of printed film could be closely related with the condition of the bar-coating technique such as coating speed, concentration and amount of solution, drying condition, and suitable film thickness was also studied by using the optical analysis with SEM. Electrical performance of printed devices is gives hysteresis and efficiency distribution.

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반도체 팹에서의 투입 로트 구성을 위한 다차원 동적계획 알고리듬 (Multi-Dimensional Dynamic Programming Algorithm for Input Lot Formation in a Semiconductor Wafer Fabrication Facility)

  • 방준영;임승길;김재곤
    • 산업경영시스템학회지
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    • 제39권1호
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    • pp.73-80
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    • 2016
  • This study focuses on the formation of input release lots in a semiconductor wafer fabrication facility. After the order-lot pegging process assigns lots in the fab to orders and calculates the required quantity of wafers for each product type to meet customers' orders, the decisions on the formation of input release lots should be made to minimize the production costs of the release lots. Since the number of lots being processed in the wafer fab directly is related to the productivity of the wafer fab, the input lot formation is crucial process to reduce the production costs as well as to improve the efficiency of the wafer fab. Here, the input lot formation occurs before every shift begins in the semiconductor wafer fab. When input quantities (of wafers) for product types are given from results of the order-lot pegging process, lots to be released into the wafer fab should be formed satisfying the lot size requirements. Here, the production cost of a homogeneous lot of the same type of product is less than that of a heterogeneous lot that will be split into the number of lots according to their product types after passing the branch point during the wafer fabrication process. Also, more production cost occurs if a lot becomes more heterogeneous. We developed a multi-dimensional dynamic programming algorithm for the input lot formation problem and showed how to apply the algorithm to solve the problem optimally with an example problem instance. It is necessary to reduce the number of states at each stage in the DP algorithm for practical use. Also, we can apply the proposed DP algorithm together with lot release rules such as CONWIP and UNIFORM.