• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.31 no.7B
• /
• pp.668-678
• /
• 2006

In designing a video-on-demand (VoD) system, one of the major challenges is how to reduce the viewer's waiting time maintaining a given bandwidth allocation and how to reduce the client's buffer requirements. To solve these problems, many VoD schemes were proposed. However, most VoD schemes require managing many segments of a video, frequency channel hopping, and using many channels at the same time. Therefore, to the complexity is a barrier to implementation. In this paper, we propose a fast staggered broadcasting scheme which has a simple structure and substantially improved VoD efficiency. The numerical results demonstrate that the viewer's waiting time of the fast staggered broadcasting scheme is close to the fast broadcasting scheme and the buffer requirements of this can be adapt for demanding rate by adjusting the short front part of a video sizes.

• The KIPS Transactions:PartA
• /
• v.12A no.3 s.93
• /
• pp.205-214
• /
• 2005

Flash memory is at high speed used as storage of personal information utilities, ubiquitous computing environments, mobile phones, electronic goods, etc. This is because flash memory has the characteristics of low electronic power, non-volatile storage, high performance, physical stability, portability, and so on. However, differently from hard disks, it has a weak point that overwrites on already written block of flash memory is impossible to be done. In order to make an overwrite possible, an erase operation on the written block should be performed before the overwrite, which lowers the performance of flash memory highly. In order to solve this problem the flash memory controller maintains a system software module called the flash translation layer(FTL). Of many proposed FTL schemes, the log block buffer scheme is best known so far. This scheme uses a small number of log blocks of flash memory as a write buffer, which reduces the number of erase operations by overwrites, leading to good performance. However, this scheme shows a weakness of low page usability of log blocks. In this paper, we propose an enhanced log block buffer scheme, FAST(Full Associative Sector Translation), which improves the page usability of each log block by fully associating sectors to be written by overwrites to the entire log blocks. We also show that our FAST scheme outperforms the log block buffer scheme.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.9 no.8
• /
• pp.3068-3078
• /
• 2015

Although the massive MIMO system supports a high throughput, it requires a lot of channel information for channel compensation. For the reduction of overhead, the massive MIMO system generally uses TDD as duplexing scheme. Therefore, the massive MIMO system is sensitive to rapidly changing fast fading in according to time. For the improvement of reduced SINR by fast fading, the adaptive power control is proposed. Unlike the conventional scheme, the proposed scheme considers mobility of device for adaptive power control. The simulation of the proposed scheme is performed with consideration for mobility of device. The result of the simulation shows that the proposed scheme improves SINR. Since SINR is decreased in according to the number of device in the network by unit of cell, each base station can accommodate more devices by the proposed scheme. Also, because the massive MIMO system with high SINR can use high order modulation scheme, it can support higher throughput.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.28 no.12A
• /
• pp.991-1001
• /
• 2003

CCFH(Candidatecasting Fast Handoff) algorithm excels the performance of existing fast handoff schemes using multicasting in terms of handoff latency and B/W efficiency. The scheme uses L2 information(BSSID) at Wireless LAN and starts multicasting before L2 handoff. So it can reduce L3 handoff latency. At this article, we would show that Candidatecasting Fast Handoff Scheme is clearly new scheme using L2 information and has the good performance.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2003.11b
• /
• pp.1105-1108
• /
• 2003

제한된 네트워크 자원을 효율적으로 활용하기 위해서는 네트워크의 대역폭 측정이 선행되어야 한다. 대역폭의 측정을 위해서 다양한 방법이 제시되었으며 Yoo Han-seoung이 제안한 Fast Convergence Scheme[1] 방식은 적은 계산량으로 빠르고 정확하게 대역폭을 찾을 수 있었으나 네트워크의 변동에 민감하게 반응하는 문제점이 있었다. 따라서 본 연구에서는 Fast Convergence Scheme 방식에서의 오류 측정값에 대한 안정성을 높이는 알고리즘을 제안하였다.

• ETRI Journal
• /
• v.27 no.6
• /
• pp.798-801
• /
• 2005

This Letter proposes a scheme that supports a fast handover effectively in hierarchical mobile IPv6 networks (F-HMIPv6) by optimizing the associated data and control flows during the handover. By NS-2 simulation, we show that the proposed scheme can give better handover performance than a simple combination of existing schemes.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.10C
• /
• pp.992-998
• /
• 2005

In this paper, An Ultra Fast Acquisition Algorithm of low transmission rate ultra-wideband(UWB) systems for car positioning and traffic light controling is proposed. Since the acquisition algorithms for CDMA system are not fast enough to access the low transmission rate UWB systems, the new ultra fast acquisition scheme which can be implemented with low cost and simplified circuit is required. The proposed algorithm adopted the Recurrent Sequential Estimation scheme and trinomial M-sequence. Therefore, The proposed scheme can reduce the average acquisition time in $1\~3{\mu}sec$ with simple circuit, even for the UWB systems which use long pseudo-noise(PN) sequence and transmit low power below the FCC EIRP emission limits. The simulation results for the average acquisition time of the proposed scheme are compared with the ones of the existing acquisition schemes.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.11 no.10
• /
• pp.1950-1956
• /
• 2007

IEEE 802.16e has many points to be improved. Among them, fast handover is essential when user moves in high speed. In this paper we proposed a fast handover scheme using handover candidate BS set. This scheme is based on IEEE 802.16e, however according to the performance evaluation results through simulation; our proposed scheme shows more than 30% of handover delay reduction and at least 5% of handover drop probability improvement.

• Journal of Power Electronics
• /
• v.16 no.4
• /
• pp.1513-1525
• /
• 2016

Rapid and accurate phase synchronization is critical for the reliable control of grid-tied inverters. However, the commonly used software phase-locked loop methods do not always satisfy the need for high-speed and accurate phase synchronization under severe grid imbalance conditions. To address this problem, this study develops a novel open-loop phase locking scheme based on a synchronous reference frame. The proposed scheme is characterized by remarkable response speed, high accuracy, and easy implementation. It comprises three functional cascaded blocks: fast orthogonal signal generation block, fast fundamental-frequency positive sequence component construction block, and fast phase calculation block. The developed virtual orthogonal signal generation method in the first block, which is characterized by noise immunity and high accuracy, can effectively avoid approximation errors and noise amplification in a wide range of sampling frequencies. In the second block, which is the foundation for achieving fast phase synchronization within 3 ms, the fundamental-frequency positive sequence components of unsymmetrical grid voltages can be achieved with the developed orthogonal signal construction strategy and the symmetrical component method. The real-time grid phase can be consequently obtained in the third block, which is free from self-tuning closed-loop control and thus improves the dynamic performance of the proposed scheme. The proposed scheme is adaptive to severe unsymmetrical grid voltages with sudden changes in magnitude, phase, and/or frequency. Moreover, this scheme is able to eliminate phase errors induced by harmonics and random noise. The validity and utility of the proposed scheme are verified by the experimental results.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.1201-1204
• /
• 2003

This paper described a replica-delay adaptive lock-acquisition scheme for high-speed DLLs. The proposed scheme provides the fast and correct locking cycle that is variable according to the magnitude of the arbitrary replica delay (fixed delay). The scheme guarantees the wide operation range and the fast lock-aquisition time. It has been confirmed by HSPICE simulations in a 0.35${\mu}{\textrm}{m}$ CMOS process.