• Title/Summary/Keyword: F1 circuit

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Design of High Performance Full-Swing BiCMOS Logic Circuit (고성능 풀 스윙 BiCMOS 논리회로의 설계)

  • Park, Jong-Ryul;Han, Seok-Bung
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.11
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    • pp.1-10
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    • 1993
  • This paper proposes a High Performance Full-Swing BiCMOS (HiF-BiCMOS) circuit which improves on the conventional BiCMOS circuit. The HiF-BiCMOS circuit has all the merits of the conventional BiCMOS circuit and can realize full-swing logic operation. Especially, the speed of full-swing logic operation is much faster than that of conventional full-swing BiCMOS circuit. And the number of transistors added in the HiF-BiCMOS for full-swing logic operation is constant regardless of the number of logic gate inputs. The HiF-BiCMOS circui has high stability to variation of environment factors such as temperature. Also, it has a preamorphized Si layer was changed into the perfect crystal Si after the RTA. Remarkable scalability for power supply voltage according to the development of VLSI technology. The power dissipation of HiF-BiCMOS is very small and hardly increases about a large fanout. Though the Spice simulation, the validity of the proposed circuit design is proved.

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In/Output Matching Network Based on Novel Harmonic Control Circuit for Design of High-Efficiency Power Amplifier (고효율 전력증폭기 설계를 위한 새로운 고조파 조절 회로 기반의 입출력 정합 회로)

  • Choi, Jae-Won;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.2
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    • pp.141-146
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    • 2009
  • In this paper, a novel harmonic control circuit has been proposed for the design of high-efficiency power amplifier with Si LDMOSFET. The proposed harmonic control circuit haying the short impedances for the second- and third-harmonic components has been used to design the in/output matching network. The efficiency enhancement effect of the proposed harmonic control circuit is superior to the class-F or inverse class-F harmonic control circuit. Also, when the proposed harmonic control circuit has been adapted to the input matching network as well as the output matching network, the of ficiency enhancement effect of the proposed power amplifier has increased all the more. The measured maximum power added efficiency (PAE) of the proposed power amplifier is 82.68% at 1.71GHz band. Compared with class-F and inverse class-F amplifiers, the measured maximum PAE of the proposed power amplifier has increased in $5.08{\sim}9.91%$.

Dynamic Stress/Strain Measurement and Analysis of the Aluminum Alloy Road Wheel through F1 Circuit Ultimate Driving Test (F1 서킷 극한주행시험을 통한 알루미늄 알로이 휠의 동응력/변형률 계측 및 분석)

  • Lee, Chang Soo;Park, Cheol Soon;Park, Hyung Bae;Jung, Sung Pil;Chung, Won Sun
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2014.10a
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    • pp.612-617
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    • 2014
  • It is generally known that the automotive road wheel involves the non-proportional multiaxial loading condition, therefore the measuring dynamic stress and strain in driving state is very important to predict an endurance characteristic of the automotive road wheel. In this study, the ultimate driving test using F1 circuit with respect to 2 kinds of velocity conditions have been carried out in order to measure dynamic stress, strain of the wheel and acceleration of a vehicle. Based on the measured results, the characteristics of dynamic stress generation have been analyzed, and factors which have effect on the dynamic stress generation have been studied.

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Optimization of Harmonic Tuning Circuit vary as Drain Voltage of Class F Power Amplifier (Class F 전력 증폭기의 드레인 전압 변화에 따른 고조파 조정 회로의 최적화)

  • Lee, Chong-Min;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.1
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    • pp.102-106
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    • 2009
  • This paper presents the design and optimization of output matching network according to envelope for class F power amplifier(PA) which is to apply to envelope elimination and restoration(EER) transmitter. In this paper, to increase the PAE of class F power amplifier which applies to EER transmitter, the varactor diode has been used on output matching network. As envelope changes, it optimizes constitution of harmonic trap that is short circuit in 2nd-harmonic and is open circuit in 3rd-harmonic. When drain voltage changes from 25 V to 30 V, some percentage is improved in the PAE.put the abstract of paper here.

Equivalent Circuit Model For Switching Performance of Bipolar Spin Transistor

  • Yong Tae, Kim;Gap Yong, Lee
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2003.12a
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    • pp.182-185
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    • 2003
  • We have suggested an equivalent circuit model for switching performance of bipolar spin transistor composed of a nonmagnetic metal film (N) sandwiched between two ferromagnetic metal films (F1 and F2). The 'ON' or 'OFF' operation of this equivalent circuit model is simulated by depending on the orientation of the magnetization of F1 and F2 rather than the strength of the external magnetic filed. Changing the coupling coefficient, turn number of two inductances, (L1:L2) like a transformer, and parallel variable resistance R4 connected to L2 at the collector region, we can explain the magnetic characteristics and the dependence of magneto resistance ratio on the orientation of spin-polarized electrons.

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Highly Improved Electrical Properties of A1/CaF2/Diamond MISFET Fabricated by Ultrahigh Vacuum Process and Its Application to Inverter Circuit (초고진공 프로세스에 의해 제작된 A/CaF2/Diamond MISFET의 개선된 전기적 특성과 인버터회로에의 응용)

  • Yun, Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.5
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    • pp.536-541
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    • 2003
  • In order to avoid oxygen contamination on the diamond surface as far as possible during the device process, the A1/Ca $F_2$/diamond MISFET(metal-insulator-semiconductor field-effect transistor) was prepared by ultrahigh vacuum process and its electrical properties were investigated. The surface conductive layer of fluorinated diamond surface was employed for the conducting channel of the MISFET. The observed effective mobility(${\mu}$e$\_$ff/) of the MISFET was 300 c $m^2$/Vs, which is the highest value obtained until now in the diamond FET. Besides, the measured surface state density of the device was ∼10$\^$11//c $m^2$ eV, which is comparable with conventional Si MOSFET$\_$s/(metal-oxide-semiconductor field-effect-transistors). This work is the first report of the fluorinated diamond MISFET prepared by ultrahigh vacuum process and its application to inverter circuit.

Capacitive Readout Circuit for Tri-axes Microaccelerometer with Sub-fF Offset Calibration

  • Ouh, Hyun Kyu;Choi, Jungryoul;Lee, Jungwoo;Han, Sangyun;Kim, Sungwook;Seo, Jindeok;Lim, Kyomuk;Seok, Changho;Lim, Seunghyun;Kim, Hyunho;Ko, Hyoungho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.1
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    • pp.83-91
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    • 2014
  • This paper presents a capacitive readout circuit for tri-axes microaccelerometer with sub-fF offset calibration capability. A charge sensitive amplifier (CSA) with correlated double sampling (CDS) and digital to equivalent capacitance converter (DECC) is proposed. The DECC is implemented using 10-bit DAC, charge transfer switches, and a charge-storing capacitor. The DECC circuit can realize the equivalent capacitance of sub-fF range with a smaller area and higher accuracy than previous offset cancelling circuit using series-connected capacitor arrays. The readout circuit and MEMS sensing element are integrated in a single package. The supply voltage and the current consumption of analog blocks are 3.3 V and $230{\mu}A$, respectively. The sensitivities of tri-axes are measured to be 3.87 mg/LSB, 3.87 mg/LSB and 3.90 mg/LSB, respectively. The offset calibration which is controlled by 10-bit DECC has a resolution of 12.4 LSB per step with high linearity. The noise levels of tri-axes are $349{\mu}g$/${\sqrt}$Hz, $341{\mu}g$/${\sqrt}$Hz and $411{\mu}g$/${\sqrt}$Hz, respectively.

A PWM Phase-Shift Circuit using an RC Delay for Multiple LED Driver ICs

  • Oh, Jae-Mun;Kang, Hyeong-Ju;Yang, Byung-Do
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.484-492
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    • 2015
  • This paper proposes a PWM phase-shift circuit to make that the LED lighting system distributes the channel currents evenly for any number of LED strings by generating evenly phase-shifted PWM signals for multiple LED driver ICs. The evenly distributed channel currents reduce the peak current, the decoupling capacitor size, and EMI noise. The PWM phase-shift circuit makes an arbitrary degree of PWM phase-shift by using a resistor and a capacitor. It measures the RC delay once. It reduces the number of external resistors and capacitors by providing zero and 180 degree phase-shift modes requiring no resistor and capacitor. An LED driver IC with the PWM phase-shift circuit was fabricated with a $0.35{\mu}m$ BCDMOS process. The PWM phase-shift circuit receives a PWM signal of 50 Hz~20 kHz at $f_{CLK}=450kHz$ and it generates a $0{\sim}360^{\circ}$ phase-shifted PWM signal with $R=0{\sim}1.1M{\Omega}$ at C=1 nF and $f_{PWM}=1kHz$. The measured phase errors are 1.74~3.94% due to parasitic capacitances.

Predistortion for Frequency-Dependent Nonlinearity of a Laser in RoF Systems

  • Najarro, Andres C.;Kim, Sung-Man
    • Journal of information and communication convergence engineering
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    • v.14 no.3
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    • pp.147-152
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    • 2016
  • In radio-over-fiber (RoF) systems, nonlinear compensation is essential to improve performance. Among the several existing nonlinear compensation techniques, we investigate a predistortion technique for a directly modulated laser in an RoF system. First, we obtain the input-to-output response of a directly modulated laser at 160, 820, and 1,540 MHz. The results show that the laser response is dependent on the frequency band. Second, we design an optimal predistortion circuit to compensate for the nonlinear responses of three frequency bands. We design the predistortion circuit with two options: each predistortion circuit for each frequency band and one single predistortion circuit for all the three frequency bands. Finally, we present the simulation results of the predistortion system obtained using a commercial simulator. These results show that the third intermodulation distortion (IMD3) is improved by 0.6-9 dB for the three frequency bands with only a single predistortion circuit.

Design Technique Using Bypass Capacitor to Improve Antenna Efficiency of Inverted-F Antenna with Band Stop Matching Circuit (Band Stop Matching Circuit이 적용된 Inverted-F Antenna의 Bypass Capacitor를 이용한 안테나 효율 향상 기법)

  • Bae, Jang Hwan;Choi, Woo Cheol;Lim, Seonho;Yoon, Young Joong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.30 no.1
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    • pp.1-7
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    • 2019
  • In this paper, a design technique using a bypass capacitor is proposed to improve the antenna efficiency of an inverted-F antenna (IFA) with a band stop matching circuit (BSMC). The proposed antenna operates in the LTE bands 26 and 5(814~ 894 MHz). The bandwidth of the IFA is expanded from 803~863 MHz to 800~888 MHz using the impedance change caused by the BSMC. To enhance the antenna efficiency in the expanded frequency band, the bypass capacitor is applied to the IFA with the BSMC. The bypass capacitor improves the efficiency of the antenna by reducing the current variation of the IFA with the BSMC. The proposed antenna has a bandwidth of 804~895 MHz and the antenna efficiency increases by more than 10 % in the extended frequency band by using the bypass capacitor.