• Journal of IKEEE
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• v.14 no.3
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• pp.190-198
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• 2010

This paper describes a auto focus piezo actuator driver IC for portable digital camera. The 80[V] DC voltage is generated by a DC-DC converter and supplied to power of piezo moving control circuit. The voltage of piezo actuator needs range -20[V] to 80[V] proportional to 1[Vp-p] input control voltages. The dimensions and number of external parts are minimized in order to get a smaller hardware size. IIC(Inter-IC) interface logic is designed for data interface and it makes debugging easy, test for mass productions. The power consumption is around 40[mW] with supply voltage of 3.6[V]. This device has been fabricated in a 0.6[um] double poly, triple metal 100[V] BCD MOS process and whole chip size is 1600*1500 [$um^2$].

• Journal of Sensor Science and Technology
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• v.13 no.2
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• pp.101-109
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• 2004

This paper presents a novel z-axis accelerometer with perfectly aligned vertical combs fabricated using the extended sacrificial bulk micromachining (extended SBM) process. The z-axis accelerometer is fabricated using only one (111) SOI wafer and two photo masks without wafer bonding or CMP processes as used by other research efforts that involve vertical combs. In our process, there is no misalignment in lateral gap between the upper and lower comb electrodes, because all critical dimensions including lateral gaps are defined using only one mask. The fabricated accelerometer has the structure thickness of $30{\mu}m$, the vertical offset of $12{\mu}m$, and lateral gap between electrodes of $4{\mu}m$. Torsional springs and asymmetric proof mass produce a vertical displacement when an external z-axis acceleration is applied, and capacitance change due to the vertical displacement of the comb is detected by charge-to-voltage converter. The signal-to-noise ratio of the modulated and demodulated output signal is 80 dB and 76.5 dB, respectively. The noise equivalent input acceleration resolution of the modulated and demodulated output signal is calculated to be $500{\mu}g$ and $748{\mu}g$. The scale factor and linearity of the accelerometer are measured to be 1.1 mV/g and 1.18% FSO, respectively.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.34-42
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• 2001

A battery is the device that transforms the chemical energy into the direct-current electrical energy directly without a mechanical process. Unit cells are connected in series to obtain the required voltage, while being connected in parallel to organize capacity for load current and to decrease the internal resistance for corresponding the sudden shift of the load current. Because the voltage droop down in one set of battery is faster than in tow one, it amy result in the low efficiency of power converter with the voltage drop and cause the system shutdown. However, when the system being driven in parallel, a circular-current can be generated. The changing current differs in each set of battery because the system including batteries, rectifiers and loads is connected in parallel and it makes the charge voltage constant. It is shown that, as a result the new batteries are heated by over-charge and over-discharge, and the over charge current increases rust of the positive grid and consequently shortens the lifetime of the new batteries. The difference between the new batteries and old ones is the amount of internal resistance. In this paper, we can detect the unbalance current using the micro-processor and achieve the balance current by adjusting resistance of each set. The internal resistance of each set becomes constant and the current of charge and discharge comes to be balanced by inserting the external resistance into the system and calculating the change of internal resistance.

• Journal of IKEEE
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• v.19 no.2
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• pp.201-209
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• 2015

This paper describes a battery charger using photovoltaic energy harvesting with MPPT control. The proposed circuit harvests maximum power from a PV(photovoltaic) cell by employing MPPT(Maximum Power Point Tracking) control and charges an external battery with the harvested energy. The charging state of the battery is controlled according to the signals from a battery management circuit. The MPPT control is implemented using linear relationship between the open-circuit voltage of a PV cell and its MPP voltage such that a pilot PV cell can track the MPP of a main PV cell in real time. The proposed circuit is designed in a $0.35{\mu}m$ CMOS process technology and its functionality has been verified through extensive simulations. The maximum efficiency of the designed entire system is 86.2% and the chip area including pads is $1.35mm{\times}1.2mm$.

• Journal of Power Electronics
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• v.14 no.3
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• pp.444-457
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• 2014

This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.5
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• pp.568-573
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• 2019

Modern Radars are evolving into MFRs which can search multiple targets simultaneously and then track them. Additionally they should be able to avoid some external jamming signals. Applying to these MFRs, Antennas should be able to perform DBF including to not only real-time beam steering but also multi-beam forming simultaneously. And they can cancel the beam at the specific direction. In this paper, we describe the implementation of sub-array type antenna hardware which can be applying DBF. Also we propose the modified amplitude aperture distribution for suppressing the side lobe level and explain the sub-array receiver design with amplitude tapering. It consists in making the amplitude weighting in 2 steps. In order to compare two weighting cases, we investigate the G/T performance for the array antenna. At the conclusion, we make a comparative study for the dynamic range of every sub-array receiver and present the hardware implementation that is more advantageous for sub-array alignment and calibration in DBF.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.8C
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• pp.1113-1124
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• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel fur the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit of a field synchronized with the A/D converter. The implemented H/W used the 69%(16980) LAB(Logic Array Block) and 9%(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation of 60 fields/sec(30 frames/sec).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.6
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• pp.1061-1068
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• 2017

A RVDT is a sensor that measures angular displacement and the output signal of RVDT is a DSBSC-AM signal. For this reason, a DSBSC-AM demodulation processor is required to determine the angular displacement from the output signal. In this paper, DADC(Digital Angle to DC) which extracts the angular displacement from the output signal of a RVDT is implemented based-on modified Costas Loop usually used in the demodulation of DSBSC-AM signal by using FPGA. DADC can used with both 4-wire and 5-wire RVDTs and can exactly compensate the phase difference between the input excitation and output signals of a RVDT unlike the conventional analog RVDT signal conditioners which require external components. Since digital signal processing technique that can enhance the linearity is exploited, DADC shows 0.035% linearity error, which is smaller than 0.005% that of a conventional analog signal conditioner. The DADC are tested in an integrated experimental environment which includes a commercial RVDT sensor, ADC and an analog output block.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.137-147
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• 2013

In this paper, an 1.2V 8b 1GS/s A/D Converter(ADC) based on a folding architecture with a resistive interpolation technique is described. In order to overcome the asymmetrical boundary-condition error of conventional folding ADCs, a novel scheme with an odd number of folding blocks and a fractional folding rate are proposed. Further, a new digital encoding technique with an arithmetic adder is described to implement the proposed fractional folding technique. The proposed ADC employs an iterating offset self-calibration technique and a digital error correction circuit to minimize device mismatch and external noise The chip has been fabricated with a 1.2V 0.13um 1-poly 6-metal CMOS technology. The effective chip area is $2.1mm^2$ (ADC core : $1.4mm^2$, calibration engine : $0.7mm^2$) and the power dissipation is about 350mW including calibration engine at 1.2V power supply. The measured result of SNDR is 46.22dB, when Fin = 10MHz at Fs = 1GHz. Both the INL and DNL are within 1LSB with the self-calibration circuit.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.36S no.2
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• pp.120-130
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• 1999

In this paper, we show that the instantaneous phase current of the bifiler-wound hybrid stepping motor is dependent of lead angle and that the information of motor position is obtained from the instantaneous phase current at ${\pi}/2$ by the theoretical formular and its computer simulation results. From the facts, we design the microcontroller-based motor position sensorless controller of optimal lead angle, which generates the excitation pulses for the closed-loop drives. The controller is consist of microcontroller which has the function of A/D converter, programmable input/output timer, and the transfer table which has the values of optimal lead angle depending on motor velocity, and ROM which has the transfer table of the values of lead angle depending on velocity of motor and the values of instantaneous phase current at ${\pi}/2$. From the design of microcontroller-based controller, we minimize the external interface circuit and obtain flexibility by changing the contents of ROM transfer tables and the control software. We confirm that the designed controller drives the bifilar-wound hybrid stepping motor is the mode of optimal lead angle by comparing the instananeous phase current experimental results and computer simulation results.