• 제목/요약/키워드: Etching Characteristics

검색결과 847건 처리시간 0.031초

Microtube Light-Emitting Diode Arrays with Metal Cores

  • Tchoe, Youngbin;Lee, Chul-Ho;Park, Junbeom;Baek, Hyeonjun;Chung, Kunook;Jo, Janghyun;Kim, Miyoung;Yi, Gyu-Chul
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.287.1-287.1
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    • 2016
  • Three-dimensional (3-D) semiconductor nanoarchitectures, including nano- and micro- rods, pyramids, and disks, are emerging as one of the most promising elements for future optoelectronic devices. Since these 3-D semiconductor nanoarchitectures have many interesting unconventional properties, including the use of large light-emitting surface area and semipolar/nonpolar nano- or micro-facets, numerous studies reported on novel device applications of these 3-D nanoarchitectures. In particular, 3-D nanoarchitecture devices can have noticeably different current spreading characteristics compared with conventional thin film devices, due to their elaborate 3-D geometry. Utilizing this feature in a highly controlled manner, color-tunable light-emitting diodes (LEDs) were demonstrated by controlling the spatial distribution of current density over the multifaceted GaN LEDs. Meanwhile, for the fabrication of high brightness, single color emitting LEDs or laser diodes, uniform and high density of electrical current must be injected into the entire active layers of the nanoarchitecture devices. Here, we report on a new device structure to inject uniform and high density of electrical current through the 3-D semiconductor nanoarchitecture LEDs using metal core inside microtube LEDs. In this work, we report the fabrications and characteristics of metal-cored coaxial $GaN/In_xGa_{1-x}N$ microtube LEDs. For the fabrication of metal-cored microtube LEDs, $GaN/In_xGa_{1-x}N/ZnO$ coaxial microtube LED arrays grown on an n-GaN/c-Al2O3 substrate were lifted-off from the substrate by wet chemical etching of sacrificial ZnO microtubes and $SiO_2$ layer. The chemically lifted-off layer of LEDs were then stamped upside down on another supporting substrates. Subsequently, Ti/Au and indium tin oxide were deposited on the inner shells of microtubes, forming n-type electrodes of the metal-cored LEDs. The device characteristics were investigated measuring electroluminescence and current-voltage characteristic curves and analyzed by computational modeling of current spreading characteristics.

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플래시 EEPROM 셀에서 ONON(oxide-nitride-oxide-nitride) Inter-Poly 유전체막의 신뢰성 연구 (Study of the Reliability Characteristics of the ONON(oxide-nitride-oxide-nitride) Inter-Poly Dielectrics in the Flash EEPROM cells)

  • 신봉조;박근형
    • 전자공학회논문지D
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    • 제36D권10호
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    • pp.17-22
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    • 1999
  • 이 논문에서는 플래시 EEPROM 셀에서의 데이터 보존 특성을 개선하기 위해서 IPD(inter-poly-dielectrics) 층을 사용하는 새로운 제안에 관한 연구 결과들을 논의하였다. 이 연구를 위하여 약 10nm 두께의 게이트 산호막을 갖으며 또한 ONO 또는 ONON IPD 층을 갖는 적층형-게이트 플래시 EEPROM 셀들을 제작하였다. 측정 결과를 보면 ONO IPD 층을 갖는 소자들은 데이터 보존 특성이 심각하게 열화 되었으며, 그 특성의 활성화 에너지도 0.78 eV로 플래시 EEPROM 셀을 위하여 요구되는 최소 값(1.0 eV)보다 상당히 낮았다. 이는 구동 소자용 트랜지스터(peripheral MOSFET) 소자들의 게이트 산호막을 형성하기 위한 건열산화 공정 바로 직전에 실시하는 세정 공정 동안 IPD 층의 상층 산화막의 일부 또는 전부가 식각되었기 때문인 것으로 믿어진다. 반면에, ONON IPD 층을 갖는 소자들의 데이터 보존 특성은 상단히 (약 50% 이상) 개선되었으며 활성화 에너지도 1.1 eV인 것으로 나타났다. 이는 IPD 층에서 상층 산화막위에 있는 질화막이 그 세정 공정 동안 산화막이 식각되는 것을 방지해 주기 때문임에 틀림없다.

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실리콘 다이아프램 구조에서 전단응력형 압전저항의 특성 분석 (Analysis of Shear Stress Type Piezoresistive Characteristics in Silicon Diaphragm Structure)

  • 최채형;최득성;안창회
    • 마이크로전자및패키징학회지
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    • 제25권3호
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    • pp.55-59
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    • 2018
  • 본 연구에서는 Si/$SiO_2$/Si-sub 구조의 SDB (silicon-direct-bonding) 웨어퍼 상에 형성된 다이아프램(diaphragm)에 제조된 전단응력형 압전저항 특성을 분석하였다. 다이아프램은 MEMS (Microelectromechanical System) 기술을 이용해 형성하였다. TMAH 수용액을 이용해 웨이퍼 후면을 식각하여 형성된 다이아프램 구조는 각종 센서제작에 활용할 수 있다. 본 연구에서는 다이아프램 상에 형성시킨 전단응력형 압전저항의 최적의 형상조건을 ANSYS 시뮬레이션을 통하여 찾고 실제 반도체 미세가공기술을 이용해 다이아프램 구조를 형성시키고 이에 붕소(boron)을 주입하여 형성시킨 전단응력형 압전저항의 특성을 시뮬레이션 결과와 비교 분석하였다. 압력감지 다이아프램은 정방형으로 제조되었다. 다이아프램의 모서리의 중심부에서 동일한 압력에 대한 최대 전단응력은 구조물이 정방형일 때 발생한다는 것을 실험으로 확인할 수 있었다. 따라서 압전저항은 다이아프램의 가장자리 중앙에 위치시켰다. 제조된 전단응력형 압전저항은 시뮬레이션 결과와 잘 일치하였고 $2200{\mu}m{\times}2200{\mu}m$ 크기의 다이아프램에 형성된 압전저항의 감도는 $183.7{\mu}V/kPa$로 나타났으며 0~100 kPa 범위의 압력에서 1.3%FS의 선형성을 가졌으며 감도의 대칭성 또한 우수하게 나타났다.

Electrical Characteristic of IGZO Oxide TFTs with 3 Layer Gate Insulator

  • Lim, Sang Chul;Koo, Jae Bon;Park, Chan Woo;Jung, Soon-Won;Na, Bock Soon;Lee, Sang Seok;Cho, Kyoung Ik;Chu, Hye Yong
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.344-344
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    • 2014
  • Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

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Characterization of GaN thick layer grown by the HVPE: Comparison of horizontal with vertical growth

  • Lai, Van Thi Ha;Jung, Jin-Huyn;Oh, Dong-Keun;Choi, Bong-Geun;Eun, Jong-Won;Lim, Jee-Hun;Park, Ji-Eun;Lee, Seong-Kuk;Yi, Sung;Shim, Kwang-Bo
    • 한국결정성장학회지
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    • 제18권3호
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    • pp.101-104
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    • 2008
  • GaN films were grown on the vertical and horizontal reactors by the hydride vapour phase epitaxy (HVPE). The structural and optical characteristics of the GaN films were investigated depending on the reactor-type. GaN epilayers were characterized by double crystal X-ray diffraction (DC-XRD), transmission electron microscopy (TEM) and photoluminescence (PL). Surface defects of two kinds of the GaN films were revealed by the wet chemical etching method, using $H_3PO_4$ acid at $200^{\circ}C$ for 8 minutes. Hexagonal etch pits were analyzed by optical microscopy and SEM. Etch pit densities were calculated to be approximately $1.4{\times}10^7$ and $1.2{\times}10^6\;cm^{-2}$ for GaN layers grown on horizontal and vertical reactors, respectively. Those results show GaN grown in the vertical reactor having a better quality of optical properties and crystallinity than that in the horizontal reactor.

CNT를 첨가한 Silicon/Carbon 음극소재의 전기화학적 특성 (Electrochemical Characteristics of Silicon/Carbon Composites with CNT for Anode Material)

  • 정민지;박지용;이종대
    • Korean Chemical Engineering Research
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    • 제54권1호
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    • pp.16-21
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    • 2016
  • 실리콘의 부피팽창과 낮은 전기전도도를 개선하기 위하여 Silicon/Carbon/CNT 복합체를 제조하였다. Silicon/Carbon/CNT 합성물은 SBA-15를 합성한 후, 마그네슘 열 환원 반응으로 Silicon/MgO를 제조하여 Phenolic resin과 CNT를 첨가하여 탄화하는 과정을 통해 합성하였다. 제조된 Silicon/Carbon/CNT 합성물은 XRD, SEM, BET, EDS를 통해 특성을 분석하였다. 본 연구에서는 충방전, 사이클, 순환전압전류, 임피던스 테스트를 통해 CNT 첨가량에 따른 전기화학적 효과를 조사하였다. $LiPF_6$ (EC:DMC:EMC=1 :1 :1 vol%) 전해액에서 Silicon/Carbon/CNT 음극활물질을 사용하여 제조한 코인셀은 CNT 함량이 7 wt% 일 때 1,718 mAh/g으로 높은 용량을 나타내었다. 코인셀의 사이클 성능은 CNT 첨가량이 증가할수록 개선되었다. 11 wt%의 CNT를 첨가한 Silicon/Carbon/CNT 음극은 두 번째 사이클 이후 83%의 높은 용량 보존율을 나타냄을 알 수 있었다.

초소경 엔드밀링을 이용한 미세 가공특성 분석 및 응용가공 (Analysis of Micro Machining Characteristics using End-milling and Its Applications)

  • 최환진;박언석;전은채;제태진;최두선
    • 한국정밀공학회지
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    • 제29권12호
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    • pp.1279-1284
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    • 2012
  • Micro structures which are widely used at various fields are commonly fabricated by lithograph, etching and laser methods. Recently, with the emergence of micro tools and ultra-precision machine tools, fabrication of the micro structures obtained using end-milling are studied. However, there are some problems due to the diameter of the micro end-mill getting smaller below $100{\mu}m$. The micro run-out resulted from miniaturization of end-mills have influence seriously on accuracy of micro structures. The error of run-out with a tooling jig showed a decrease of about $9.3{\mu}m$. Furthermore, micro structures with width of $30{\mu}m$ could be applied through experiments of slot machining obtained using 30 and $50{\mu}m$ end-mill. Also, narrow angle structures with $30^{\circ}$ angle could be applied through analysis of machining acute angle structures. Based on basic experiments, micro fluidics channels and spiral patterns for air bearing were machined.

Electromagnetic Micro x-y Stage for Probe-Based Data Storage

  • Park, Jae-joon;Park, Hongsik;Kim, Kyu-Yong;Jeon, Jong-Up
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제1권1호
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    • pp.84-93
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    • 2001
  • An electromagnetic micro x-y stage for probe-based data storage (PDS) has been fabricated. The x-y stage consists of a silicon body inside which planar copper coils are embedded, a glass substrate bonded to the silicon body, and eight permanent magnets. The dimensions of flexures and copper coils were determined to yield $100{\;}\mu\textrm{m}$ in x and y directions under 50 mA of supplied current and to have 440 Hz of natural frequency. For the application to PDS devices, electromagnetic stage should have flat top surface for the prevention of its interference with multi-probe array, and have coils with low resistance for low power consumption. In order to satisfy these design criteria, conducting planar copper coils have been electroplated within silicon trenches which have high aspect ratio ($5{\;}\mu\textrm{m}$in width and $30{\;}\mu\textrm{m}$in depth). Silicon flexures with a height of $250{\;}\mu\textrm{m}$ were fabricated by using inductively coupled plasma reactive ion etching (ICP-RIE). The characteristics of a fabricated electromagnetic stage were measured by using laser doppler vibrometer (LDV) and dynamic signal analyzer (DSA). The DC gain was $0.16{\;}\mu\textrm{m}/mA$ and the maximum displacement was $42{\;}\mu\textrm{m}$ at a current of 180 mA. The measured natural frequency of the lowest mode was 325 Hz. Compared with the designed values, the lower natural frequency and DC gain of the fabricated device are due to the reverse-tapered ICP-RIE process and the incomplete assembly of the upper-sided permanent magnets for LDV measurements.

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다층구조를 갖는 다공질규소층의 제작과 이의 물성 (The study of the fabrication and physical properties of porous silicon multilayers)

  • 김영유;전종현;류성주;이영섭;이기원;최봉수
    • 한국결정성장학회지
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    • 제9권6호
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    • pp.597-600
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    • 1999
  • 단결정규소 웨이퍼를 15% HF-에탄올 용액에서 양극 산화시켜 다공질규소를 얻는 과정에서 전류밀도와 에칭시간에 따라 굴절률이 주기적으로 변하는 다층의 다공질규소층(porous silicon multilayers)을 구현하였다. 그리고 다층의 다공질규소층(I), 다공질규소 발광층, 또 다른 다층의 다공질규소층(II)의 순으로 구성된 porous silicon microcavity(PSM)를 제작하고 그 물성을 조사하였다. PSM 상하에 위치한 다층의 다공질규소층의 단면을 AFM(Atomic Force Microscope)으로 조사한 결과 고굴 절률과 저굴절률이 주기적으로 교차하는 층이 균일하게 형성되었으며, 중앙의 다공질규소 발광층도 균일하게 나타났다. 다층의 다공질규소층 및 다공질규소 발광층의 두께를 각각 실효파장의 1/4배 및 2배가 되도록 하였을 때 특정파장의 필터로 쓰일 수 있는 브래그 반사경(Bragg reflector)의 특성이 나타났다. 또한 PSM의 발광 스펙트럼은 그 반치폭이 현저히 감소하고 발광의 세기가 크게 증가되는 경향을 보였다.

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Comparative simulation of microwave probes for plasma density measurement and its application

  • 김대웅;유신재;김시준;이장재;김광기;이영석;염희중;이바다;김정형;오왕열
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.185.2-185.2
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    • 2016
  • The plasma density is an essential plasma parameter describing plasma physics. Furthermore, it affects the throughput and uniformity of plasma processing (etching, deposition, ashing, etc). Therefore, a novel technique for plasma density measurement has been attracting considerable attention. Microwave probe is a promising diagnostic technique. Various type of cutoff, hairpin, impedance, transmission, and absorption probes have been developed and investigated. Recently, based on the basic type of probes, modified flat probe (curling and multipole probes), have been developing for in situ processing plasma monitoring. There is a need for comparative study between the probes. It can give some hints on choosing the reliable probe and application of the probes. In this presentation, we make attempt of numerical study of different kinds of microwave probes. Characteristics of frequency spectrum from probes were analyzed by using three-dimensional electromagnetic simulation. The plasma density, obtained from the spectrum, was compared with simulation input plasma density. The different microwave probe behavior with changes of plasma density, sheath and pressure were found. To confirm the result experimentally, we performed the comparative experiment between cutoff and hairpin probes. The sheath and collision effects are corrected for each probe. The results were reasonably interpreted based on the above simulation.

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