• Title/Summary/Keyword: Error synthesis model

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A Model Reduction and PID Controller Design Via Frequency Transfer Function Synthesis (주파수 전달함수 합성법에 의한 모델축소 및 PID 제어기 설계)

  • Kim, Ju-Sik;Kwang, Myung-Shin;Kim, Jong-Gun;Jeon, Byeong-Seok;Jeong, Su-Hyun
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.54 no.1
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    • pp.34-40
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    • 2005
  • This paper presents a frequency transfer function synthesis for simplifying a high-order model with time delay to a low-order model. A model reduction is based on minimizing the error function weighted by the numerator polynomial of reduced systems. The proposed method provides better low frequency fit and a computer aided algorithm. And in this paper, we present a design method of PID controller for achieving the desired specifications via the reduced model. The proposed method identifies the parameter vector of PID controller from a linear system that develops from rearranging the two dimensional input matrices and output vectors obtained from the frequency bounds.

A Study on Robustness of a Servosystem with Nonlinear Type Uncertainty (I) - A Synthesis of 2DOF Servosystem (비선형 불확실성에 대한 서보계의 강인성에 관한 고찰(I) - 직달항을 고려한 2자유도 서보계의 구성)

  • Kim, Young-Bok
    • Journal of Ocean Engineering and Technology
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    • v.13 no.3B
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    • pp.91-98
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    • 1999
  • In order to reject the steady-state tracking error, it is common to introduce integral compensators in servosystems for constant reference signals. However, if the mathematical model of the plant is exact and no disturbance input exists, the integral compensation is not necessary. From this point of view, a two-degree-of-freedom(2DOF) servosystem has been proposed, in which the integral compensation is effective only when there is a modeling error or a disturbance input. The present paper considers a synthesis problems of this 32DOF servosystem with direct transfer term in the system representation. And, a method how we may obtain a gain such that desirable transient response is achieved, is proposed in the presence of the modelling error and disturbance input.

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A Study on the System Identification based on Neural Network for Modeling of 5.1. Engines (S.I. 엔진 모델링을 위한 신경회로망 기반의 시스템 식별에 관한 연구)

  • 윤마루;박승범;선우명호;이승종
    • Transactions of the Korean Society of Automotive Engineers
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    • v.10 no.5
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    • pp.29-34
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    • 2002
  • This study presents the process of the continuous-time system identification for unknown nonlinear systems. The Radial Basis Function(RBF) error filtering identification model is introduced at first. This identification scheme includes RBF network to approximate unknown function of nonlinear system which is structured by affine form. The neural network is trained by the adaptive law based on Lyapunov synthesis method. The identification scheme is applied to engine and the performance of RBF error filtering Identification model is verified by the simulation with a three-state engine model. The simulation results have revealed that the values of the estimated function show favorable agreement with the real values of the engine model. The introduced identification scheme can be effectively applied to model-based nonlinear control.

Spring Connected Size-Variable Rigid Block Model for Automatic Synthesis of a Planar Linkage Mechanism (평면 링크기구 자동 설계를 위한 스프링 연결 사이즈 가변 블록 모델)

  • Kim, Bum-Suk;Yoo, Hong-Hee
    • Proceedings of the KSME Conference
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    • 2008.11a
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    • pp.822-826
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    • 2008
  • A linkage mechanism is a device to convert an input motion into a desired output motion. Traditional linkage mechanism designs are based on trial and error approaches so that size or shape changes of an original mechanism often result in improper results. In order to resolve these problems, an improved automatic mechanism synthesis method that determines the linkage type and dimensions by using an optimization method during the synthesis process has been proposed. For the synthesis, a planar linkage is modeled as a set of rigid blocks connected by zero-length translational springs with variable stiffness. In this study, the sizes of rigid blocks were also treated as design variables for more general linkage synthesis. The values of spring stiffness and the size of rigid block yielding a desired output motion at the end-effecter are found by using an optimization method.

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Improved component mode synthesis method using experimental obtained modal data (실험모달데이터를 사용한 구분모두 합성법의 개선)

  • 장경진;지태한;박영필
    • Journal of KSNVE
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    • v.6 no.1
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    • pp.97-106
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    • 1996
  • This paper presents systematic study of the experimental application of a free-interfaced component mode synthesis method. In the free-interfaced component mode synthesis method, an error the to truncated higher modes and neglected ineria loadings on a component from the connected component is inherent. Also, it is difficult to directly use experimental modal data in a modal synthesis method which links experimental model to finite-element model because of many inconsistencies between experimentally obtained and analytically obtained modal vectors and missing degrees-of-freedom (DOFs) such as rotational DOFs. In order to solve these problems, three methods, the first one based on attaching auxiliary weights to the connection points, the second one utillizing the normalization of experimental modal vector, and the third one generating smoothed and expanded experimental mode shapes, are studied in this paper. Finally, the study is illustrated for a flat-plate structure by using simulated and measured experimental data.

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A Study on the Control System Design through Systems Engineering Approach (체계공학 접근방법을 통한 제어시스템 설계에 관한 연구)

  • 안장근
    • Journal of the Korea Institute of Military Science and Technology
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    • v.7 no.1
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    • pp.13-23
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    • 2004
  • There are several kinds of error factors in control system design. All error factors must be analysed before designing the control system. Therefore, each error factor must be compensated and eliminated completely. Systems Engineering can solve these error factors. In this paper, systems engineering approach on control system design are studied under model based systems engineering with RDD-100, Matlab-Simulink. Systems Engineering shall be used in defense development from control system design to system development.

A Design of Mutirate Filter flanks using Un Control Approach ($H_\infty$ 제어기법을 적응한 다중비 필터 뱅크의 설계)

  • 이상철;박종우;박계원
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.6
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    • pp.1089-1093
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    • 2001
  • A H$\infty$ control theory is applied to the design problem of synthesis filters in a mutirate filter bank. We select a desired pure time-delay system as reference model, and then consider the error system between the mutirate filter bank and the reference model. 1'he synthesis filters minimize the ι$_2$-induced norm of the error system.

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A Design of Mutilate Filter Banks using $H_\infty$ Control Approach ($H_\infty$ 제어기법을 적용한 다중비 필터 뱅크의 설계)

  • 이상철;박종우;박계원
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.10a
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    • pp.275-278
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    • 2001
  • A H$_{\infty}$ control theory is applied to the design problem of synthesis filters in a mutirate filter bank. We select a desired pure time-delay system as reference model, and then consider the error system between the mutilate filter bank and the reference model. The synthesis filters minimize the ι$_2$-induced norm of the error system.

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Design of Reed Solomon Decoder for Optical Disks (광학식 디스크를 위한 Reed Solomon 복호기 설계)

  • 김창훈;박성모
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.262-265
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    • 2000
  • This paper describes design of a (32, 28) Reed Solomon decoder for optical compact disk provides double error detecting and correcting capability. The most complex circuit in the RS decoder is part for solving the error location numbers from error location polynomial, and the circuit has great influence on overall decoder complexity. We use RAM based architecture with Euclid algorithm, Chien search algorithm and Forney algorithm. We have developed VHDL model and Performed logic synthesis using the SYNOPSYS CAD tool. Then, the RS decoder has been implemented with FPGA. The total umber of gate is about 11,000 gates and it operates at 20MHz.

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Analysis of the Timing of Spoken Korean Using a Classification and Regression Tree (CART) Model

  • Chung, Hyun-Song;Huckvale, Mark
    • Speech Sciences
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    • v.8 no.1
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    • pp.77-91
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    • 2001
  • This paper investigates the timing of Korean spoken in a news-reading speech style in order to improve the naturalness of durations used in Korean speech synthesis. Each segment in a corpus of 671 read sentences was annotated with 69 segmental and prosodic features so that the measured duration could be correlated with the context in which it occurred. A CART model based on the features showed a correlation coefficient of 0.79 with an RMSE (root mean squared prediction error) of 23 ms between actual and predicted durations in reserved test data. These results are comparable with recent published results in Korean and similar to results found in other languages. An analysis of the classification tree shows that phrasal structure has the greatest effect on the segment duration, followed by syllable structure and the manner features of surrounding segments. The place features of surrounding segments only have small effects. The model has application in Korean speech synthesis systems.

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