• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.219-223
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• 2003

This paper describes an estimation of DOA(Direction Of Arrival) measurement system using DBF receiver with linear array antenna. This DBF receiver is composed of resistive FET mixer using low IF mettled. A radio frequency(RF), a local oscillator(LO) and ail intermediate frequency(IF) considered in this research are 2.09 GHz, 2.08 GHz and 10 MHz, respectively. This receiver is composed of a band-pass filter, a low-pass filter, a DC bias circuit. DOA measurement system is consist of linear array antenna, DBF receiver, AD control box and computer in the anechoic chamber. Receiving antenna is 4-array monopole antenna and DBF receiver is 4-Ch resistive FET mixer without amplifier. DOA algorithm is implemented using MUSIC algorithm with high resolution. We show that the results of DOA is $-30^{\circ},\;0^{\circ}$ and $60^{\circ}$, respectively. And we know that DOA estimation error occur by antenna radiation pattern and fabrication error of antenna array.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2649-2656
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• 2010

MC-DS-CDMA is technique where a single data symbol is transmitted at multiple subcarriers which are orthogonal to each other. With this technique, frequency diversity can be achieved. The performance of uplink MC-DS-CDMA systems with the application of MRRC antenna diversity over time variant channels is analyzed. Time variant channels lead to interchannel interference which increases the bit error rate in the receiver. The BER performance of this system over multipath fading environment is evaluated, considering the channel estimation error, carrier frequency offset, and the nonlinear high power amplifier.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.12
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• pp.671-678
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• 1999

In this study, it has been aimed that the accuracy of position control be increased by microstep drive to the 2 phase 8 pole HB type prototype of linear pulse motor of which winding are applied sine wave current and the vibration and noise in the lower speed region be decreased. The fixed off-time method which controls the exciting current bandwidth, was applied to the microstep current controller. When the LPM was driven 1/8 microstep its accuracy of position was 0.109[mm] (=tooth pitch 3.5[mm] ). Also, the elimination method of harmonics in the static thrust force is proposed. It was confirmed that the position error range of the prototype LPM was $\pm$0.2[mm].

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.1
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• pp.99-106
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• 2001

In this paper, an 1-Watt amplifier for IMT-2000 was designed and fabricated using feedfarward method which has the highest linearity and wide bandwidth. Since feedforward is sensitive to surroundings for example heat, input power level, time and so on, adaptive controller using micro controller is adopted. We fabricated a HPA with 35 dB gain, 40 dBm of 1-dB compression point, and utilized variable attenuator and variable phase shifter using reflection type to cancel loop signal. From the measured results, the fo11owing facts were obtained, in signal loop, main carrier over 35 dB was suppressed and error signal over 30 dB is cancelled in error loop, IMD characteristics above 60 dBc were obtained.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.6
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• pp.163-168
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• 2018

We developed W-band transceiver module using open MMIC chip such as receiver single chip and transmitting power amplifier. In order to calculate the noise figure and output power value, we analyzed the W-band transition loss from the antenna to MMIC connection and constructed the 12 channel receiver and the 5 channel transmitter. And compared with the results of the measurement. As a result, the output power of the transmitter was similar to the analytical results and the measured results at room temperature and environmental conditions. The noise figure of the receiver was also similar, but some channels showed error of about 3 dB due to manufacturing error.

• Journal of the Semiconductor & Display Technology
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• v.18 no.1
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• pp.59-64
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• 2019

Recently, time synchronous has become important for satellite launch control facilities, multiple thermal power plants, and power system facilities. Information from time synchronous at each of these industrial sites requires time synchronization to control or monitor the system with correlation. In this paper, IRIG-B codes, which can be used for time synchronous, are used as specifications in IRIG standard 200-16. Signals from IRIG-B120 (Analog), IRIG-B000 (Digital), and one PPS are output from GPS receiver. Using the signal from IRIG-B120 (Analog), it passes through the signal from the analog amplifier and generates one PPS signal using the field-programmable gate array. The FPGA is used cyclone EPM570T100I5N. According to IEEE regulations, the error of one PPS is specified within 1us, but in this paper, the error is within 100ns. The output of the one PPS signal was then compared and tested against the one PPS signal on the GPS receiver to verify accuracy and reliability. In addition, the proposed time synchronous is simple to construct and structure, easy to implement, and provides high time precision compared to typical time synchronous. The output of the one PPS signals and IRIG-B000 signal will be used in many industry sectors.

• Journal of Power Electronics
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• v.5 no.2
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• pp.104-108
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• 2005

This paper presents the performance improvement of voltage-mode controlled interleaved synchronous buck converters. This is a voltage-mode controlled scheme, where the controllers do not need an external saw-tooth generator for PWM generation and the loop design is easier. The controller implementation requires only a single error amplifier and gives almost current mode control performance. The control scheme uses voltage feedback with two loops similar to current mode control: one for the slow outer loop and the other for the faster inner PWM control loop. To improve the performance of the converter system a coupled inductor is used. This coupled inductor reduces the magnetic size and also improves the converter's transient performance without increasing the steady-state current ripple. The effectiveness of the proposed control scheme is demonstrated through PSIM simulations.

• Journal of information and communication convergence engineering
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• v.9 no.6
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• pp.743-746
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• 2011

An implementation for surface EMG network analysis and vertical control system of robotic arm is presented in this paper. The transmembranes are simulated by equivalent circuit and cable equation for propagation to be converted to circuit networks. The implementation is realized to be derived from the detecting EMG signal from 3 electrodes, and EMG transmembrane signals of human arm muscles are detected by several surface electrodes, high performance amplifier and filtering, converting analog to digital data and driving a servomotor for spontaneous robotic arm. The system is experimented by monitoring multiple steps vertical control angles corresponding to biceps muscle movement. The experimental results are that the vertical moving control level is measured to around 2 degrees and mean error ranges are lower 5%.

• ETRI Journal
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• v.37 no.2
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• pp.338-347
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• 2015

The multi-carrier transmission signal in Multi-Carrier Code Division Multiple Access (MC-CDMA) has a high peak-to-average power ratio (PAPR), which results in nonlinear distortion and deteriorative system performance. An n-tuple selective mapping method is proposed to reduce the PAPR, in this paper. This method generates $2^n$ sequences of an original data sequence by adding n-tuple of n PAPR control bits to it followed by an interleaver and error-control code (ECC) to reduce its PAPR. The convolutional, Golay, and Hamming codes are used as ECCs in the proposed scheme. The proposed method uses different numbers of the n PAPR control bits to accomplish a noteworthy PAPR reduction and also avoids the need for a side-information transmission. The simulation results authenticate the effectiveness of the proposed method.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.494-498
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• 2004

In this paper, the design of a CMOS exponential V-I converter (EVIC,) based on Taylor's concept, is presented. The composite NMOS transistor is used for realizing the exponential characteristics. In a 0.25 $\mu$m CMOS process, the simulations show more than 20 dB output current range and 15 dB linear range with the linearity error less than $\pm$ 0.5 dB. The power dissipation is less than 0.3 mW with $\pm$ 1.5 V supply voltage. The proposed EVIC can be used for the design of an extremely low­voltage and low-power variable gain amplifier (VGA) and automatic gain control (AGC).