• 마이크로전자및패키징학회지
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• 제28권4호
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• pp.25-29
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• 2021

본 연구에서는 HVPE 방법을 사용하여 Ni-Pd and Carbon-Nanotube nanoalloys (Ni-Pd-CNT) 위에 α-Ga₂O₃을 성장시켜 Ni-Pd-CNT에 따른 효과를 확인하였다. 그 결과, 무전해 Ni 도금 시간 40초에서 성장한 α-Ga₂O₃ 에피층의 두께는 11 ㎛로 확인되었다. 또한, α-Ga₂O₃ 에피층의 표면 형태는 균열 발생 없이 기판에 대한 우수한 접착력을 보여주었다. 결과적으로, 성장과정에서 발생한 수평 성장에 의해 α-Ga₂O₃ 대의 비대칭면인 ($10{\bar{1}}4$) FWMH 값을 크게 감소할 수 있었다.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2002년도 학술대회 논문집
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• pp.340-340
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• 2002

In an effort to develop alternative single buffer layer technology for YBa$_2$Cu$_3$O$_{7-{\delta}}$ (YBCO) coated conductors, we have investigated both LaMnO$_3$, (LMO) and La$_2$Zr$_2$O$_{7}$ (LZO) as potential buffer layers. High-quality LMO films were grown directly on textured Ni and Ni-W (3%) substrates using rf magnetron sputtering. Highly textured LZO buffers were grown on textured Ni substrates using sol-gel alkoxide processing route. YBCO films were then grown on both LMO and LZO buffers using pulsed laser deposition. Detailed X-ray studies have shown that YBCO films were grown on both LMO and LZO layers with a single epitaxial orientation. A high J$_{c}$ of over 1 MA/cm$^2$ at 77 K and self-field was obtained on YBCO films grown on both LMO-buffered Ni or Ni-W substrates, and also on LZO-buffered Ni substrates. We have identified LaMnO$_3$ as a good diffusion barrier layer for Ni and it also provides a good template for growing high current density YBCO films. Similarly we have also demonstrated the growth of high J$_{c}$ YBCO films on all solution buffers. We will discuss in detail about our buffer deposition processes. processes.s.s.s.s.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2001년도 추계학술발표회 초록집
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• pp.68-68
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• 2001

Thin films of polycrystalline silicon (poly-Si) is a promising material for use in large-area electronic devices. Especially, the poly-Si can be used in high resolution and integrated active-matrix liquid-crystal displays (AMLCDs) and active matrix organic light-emitting diodes (AMOLEDs) because of its high mobility compared to hydrogenated _amorphous silicon (a-Si:H). A number of techniques have been proposed during the past several years to achieve poly-Si on large-area glass substrate. However, the conventional method for fabrication of poly-Si could not apply for glass instead of wafer or quartz substrate. Because the conventional method, low pressure chemical vapor deposition (LPCVD) has a high deposition temperature ($600^{\circ}C-1000^{\circ}C$) and solid phase crystallization (SPC) has a high annealing temperature ($600^{\circ}C-700^{\circ}C$). And also these are required time-consuming processes, which are too long to prevent the thermal damage of corning glass such as bending and fracture. The deposition of silicon thin films on low-cost foreign substrates has recently become a major objective in the search for processes having energy consumption and reaching a better cost evaluation. Hence, combining inexpensive deposition techniques with the growth of crystalline silicon seems to be a straightforward way of ensuring reduced production costs of large-area electronic devices. We have deposited crystalline poly-Si thin films on soda -lime glass and SiOz glass substrate as deposited by PVD at low substrate temperature using high power, magnetron sputtering method. The epitaxial orientation, microstructual characteristics and surface properties of the films were analyzed by TEM, XRD, and AFM. For the electrical characterization of these films, its properties were obtained from the Hall effect measurement by the Van der Pauw measurement.

• 반도체디스플레이기술학회지
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• 제22권1호
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• pp.134-138
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• 2023

This study focuses on the analysis of the results of computational fluid dynamics simulations of mist-chemical vapor deposition for the growth of an epitaxial wafer in power semiconductor technology using artificial intelligence techniques. The conventional approach of predicting the uniformity of the deposited layer using computational fluid dynamics and design of experimental takes considerable time. To overcome this, artificial intelligence method, which is widely used for optimization, automation, and prediction in various fields, was utilized to analyze the computational fluid dynamics simulation results. The computational fluid dynamics simulation results were analyzed using a supervised deep neural network model for regression analysis. The predicted results were evaluated quantitatively using Euclidean distance calculations. And the Bayesian optimization was used to derive the optimal condition, which results obtained through deep neural network training showed a discrepancy of approximately 4% when compared to the results obtained through computational fluid dynamics analysis. resulted in an increase of 146.2% compared to the previous computational fluid dynamics simulation results. These results are expected to have practical applications in various fields.

• 한국전기전자재료학회논문지
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• 제36권5호
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• pp.442-453
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• 2023

Tandem or multijunction solar cells (MJSCs) can convert sunlight into electricity with higher efficiency (η) than single junction solar cells (SJSCs) by dividing the solar irradiance over sub-cells having distinct bandgaps. The efficiencies of various common SJSC materials are close to the edge of their theoretical efficiency and hence there is a tremendous growing interest in utilizing the tandem/multijunction technique. Recently, III-V materials integration on a silicon substrate has been broadly investigated in the development of III-V on Si tandem solar cells. Numerous growth techniques such as heteroepitaxial growth, wafer bonding, and mechanical stacking are crucial for better understanding of high-quality III-V epitaxial layers on Si. As the choice of growth method and substrate selection can significantly impact the quality and performance of the resulting tandem cell and the terminal configuration exhibit a vital role in the overall proficiency. Parallel and Series-connected configurations have been studied, each with its advantage and disadvantages depending on the application and cell configuration. The optimization of both growth mechanisms and terminal configurations is necessary to further improve efficiency and lessen the cost of III-V on Si tandem solar cells. In this review article, we present an overview of the growth mechanisms and terminal configurations with the areas of research that are crucial for the commercialization of III-V on Si tandem solar cells.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2002년도 학술대회 논문집
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• pp.339-339
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• 2002

In the RABiTS approach to coated conductor development, successful (both economic and technological) depends on the refinement and optimization of each of three important components: the metal tape substrate, the buffer layer(s), and the HTS layer. Here we will report on the ORNL approach and progress in each of these areas. - Most applications will require metal tapes with low magnetic hysteresis, mechanical strength, and excellent crystalline texture. Some of these requirements are competing. We report on progress in obtaining a good combination of these characteristics on metal alloys of Ni-Cr and Ni-W. - The deposition of appropriate buffer layers is a crucial step. Recently, base research has shown that the presence of a stable sulfur superstructure present on the metal surface is needed for the nucleation and epitaxial growth of vapor-deposited seed buffer layers such as YSZ, CeO$_2$ and SrTiO$_3$. We report on the details and control of this superstructure for nickel tapes, as well as recent results for Cu and Ni-13%Cr. - Processes for deposition of the HTS coating must economically provide large values of the figure-of-merit for conductors, current x length. At ORNL, we have devoted efforts to a precursor/post-annealing approach to YBCO coatings, for which the deposition and reaction steps are separate. We describe motivation for and progress toward developing this approach. - Finally, we address some issues for the implementation of coated conductors in real applications, including the need for texture control and electrical stabilization of the HTS coating.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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• pp.20-20
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• 2003

We developed 30 ㎽-AlInGaN based violet laser diodes. The fabrication procedures of the laser diodes are described as follows. Firstly, GaN layers having very low defect density were grown on sapphire substrates by lateral epitaxial overgrowth method. The typical dislocation density was about 1-3$\times$10$^{6}$ /$\textrm{cm}^2$ at the wing region. Secondly, AlInGaN laser structures were grown on LEO-GaN/sapphire substrates by MOCVD. UV activation method, instead of conventional annealing, was conducted to achieve good p-type conduction. Thirdly, ridge stripe laser structures were fabricated. The cavity mirrors were formed by cleaving method. Three pairs of SiO$_2$ and TiO$_2$ layers were deposited on the rear facet for mirror coating. Lastly, laser diode chips were mounted on AlN submount wafers by epi-down bonding method. The lifetime of the laser diodes was over 10,000 hrs at room temperature under automatic power controlled condition. We expect the performance of the LDs to be improved by the optimization of the growth and fabrication process. The detailed characteristics and important issues of the laser diodes will be discussed at the conference.

• 한국결정성장학회지
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• 제7권1호
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• pp.70-75
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• 1997

Electron beam 증착법을 보완하여 GaAs(100)기판위에 cubic(zinc blende) CdSe 에피충을 성장시켜 그의 특성을 조사하였다 .. CdSe 에피충의 격자 상수는 6.077 A였으며, 배향 성은 ECP 패번에 의하여 확인되고 결정성은 DCXR curve로 관찰하였다. 상온에서 측정된 H Hall data로는 에피충의 운반자 농도와 이통도는 각각 1018cm-3, 102cm2N' see 정도임을 알았 고 30 K에서 측정한 PC spectra peak는 cubic CdSe의 free exciton에 기인된 것으로 1.746 e eV에서 예리하게 나타냐고 있음을 보여주고 있다.

• 한국재료학회지
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• 제34권6호
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• pp.283-290
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• 2024

The aggressive scaling of dynamic random-access memory capacitors has increased the need to maintain high capacitance despite the limited physical thickness of electrodes and dielectrics. This makes it essential to use high-k dielectric materials. TiO₂ has a large dielectric constant, ranging from 30~75 in the anatase phase to 90~170 in rutile phase. However, it has significant leakage current due to low energy barriers for electron conduction, which is a critical drawback. Suppressing the leakage current while scaling to achieve an equivalent oxide thickness (EOT) below 0.5 nm is necessary to control the influence of interlayers on capacitor performance. For this, Pt and Ru, with their high work function, can be used instead of a conventional TiN substrate to increase the Schottky barrier height. Additionally, forming rutile-TiO₂ on RuO₂ with excellent lattice compatibility by epitaxial growth can minimize leakage current. Furthermore, plasma-enhanced atomic layer deposition (PEALD) can be used to deposit a uniform thin film with high density and low defects at low temperatures, to reduce the impact of interfacial reactions on electrical properties at high temperatures. In this study, TiO₂ was deposited using PEALD, using substrates of Pt and Ru treated with rapid thermal annealing at 500 and 600 ℃, to compare structural, chemical, and electrical characteristics with reference to a TiN substrate. As a result, leakage current was suppressed to around 10^-6 A/cm² at 1 V, and an EOT at the 0.5 nm level was achieved.

• 한국결정성장학회지
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• 제34권4호
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• pp.109-116
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• 2024

β-Ga₂O₃는 4.9 eV의 넓은 밴드갭과 8 MV/cm의 높은 항복전압으로 전력 소자 응용 분야에서 많은 관심을 받고 있는 대표적인 UWBG(Ultra-wide Band-gap) 반도체이다. 또한 용액 성장이 가능하기 때문에 SiC, GaN에 비해 성장 속도가 빠르고 생산 비용이 저렴하다는 장점이 있다[1,2]. 본 연구에서는 EFG(Edge-defined Film-fed Growth) 법을 통해 Si 도핑 된 β-Ga₂O₃ 단결정을 성장시키는 데에 성공하였다. 성장 방향과 성장 주 면은 각각 [010] / (001)로 설정하였으며 성장속도는 7~20 mm/h이다. 성장시킨 β-Ga₂O₃ 단결정은 다양한 결정 면 방향(001, 100, ${\bar{2}}01$)과 off-angle(1^o, 3^o, 4^o)에 따라 절단하여 표면 가공을 진행하였고, 가공 후 HVPE(Halide vapor phase epitaxy) 법을 이용해 epi-ready 기판 위에 homoepitaxial 층을 성장시켰다. 가공 후의 샘플과 epi-layer를 성장시킨 샘플을 XRD, AFM, OM, Etching 등의 분석을 통해 결정면과 off-angle에 따른 표면 특성을 비교하였다.