• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.46 no.1
• /
• pp.102-106
• /
• 2009

This paper presents the design and optimization of output matching network according to envelope for class F power amplifier(PA) which is to apply to envelope elimination and restoration(EER) transmitter. In this paper, to increase the PAE of class F power amplifier which applies to EER transmitter, the varactor diode has been used on output matching network. As envelope changes, it optimizes constitution of harmonic trap that is short circuit in 2nd-harmonic and is open circuit in 3rd-harmonic. When drain voltage changes from 25 V to 30 V, some percentage is improved in the PAE.put the abstract of paper here.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.26 no.3
• /
• pp.292-299
• /
• 2015

An envelope elimination and restoration transmitter that uses a tri-level envelope encoding scheme is presented for improving the efficiency and linearity of the system. The proposed structure amplifies the same magnitude signal regardless of the input peak-to-average power ratio and reduces the quantization noise by spreading out the noise to the out-of-band frequency, resulting in the enhancement of power efficiency. An improved linearity is also obtained by providing a new timing mismatch calibration technique between the envelope and phase signal. Implementation in a 130 nm CMOS process, transmitter measurements on a 20-MHz long-term evolution input signal show an error vector magnitude of 3.7 % and an adjacent channel leakage ratio of 37.5 dBc at 2.13 GHz carrier frequency.

• ETRI Journal
• /
• v.30 no.3
• /
• pp.377-382
• /
• 2008

A novel power amplifier for a polar transmitter is proposed to achieve better spectral performance for a wideband envelope signal. In the proposed scheme, 2-bit sigma-delta (${\Sigma}{\Delta}$) modulation of the envelope signal is introduced, and the power amplifier configuration is modified in a binary form to accommodate the 2-bit digitized envelope signals. The 2-bit ${\Sigma}{\Delta}$ modulator lowers the noise of the envelope signal by fine quantization and thus enhances the spectral property of the RF signal. The Ptolemy simulation results of the proposed structure show that the spectral noise is reduced by 10 dB in a full transmit band of the EDGE system. The dynamic range is also enhanced. Since the performance is improved without increasing the over-sampling ratio, this technique is best suited for wireless communication with high data rates.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.47 no.2
• /
• pp.80-85
• /
• 2010

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using metamaterial structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. CRLH structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 5.93 %, 12.83 dB compared with those of conventional Class-F amplifier, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.18 no.6 s.121
• /
• pp.584-590
• /
• 2007

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using PBG structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. PBG structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 34.64%, 6.65 dB compared with those of conventional Doherty amplifier, respectively.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.18 no.1
• /
• pp.72-83
• /
• 2013

The paper proposes a new multilevel variable output voltage AC/DC Converter for power supply of power amplifiers used in underwater acoustic sensors. The proposed multilevel variable output voltage AC/DC Converter is composed of two parts. One as the input section is the high efficiency phase-shifted PWM full bridge DC-DC converter to get multiport power sources. The other as the output section is composed of two flying-capacitor 3-level DC-DC converters and a diode bridge circuit to get fast-response and multilevel variable output voltage for an envelope amplifier. Also the paper suggests the detailed circuit topology and design guideline of multilevel variable output voltage AC/DC converter. It also proposes the power balanced control method between 3-level converters and the voltage balanced algorithm for flying capacitors. Its characteristics should be verified by the detailed simulation results. It is anticipated that the proposed converter will be used very well for power amplifiers used in underwater acoustic sensors.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.18 no.8
• /
• pp.970-976
• /
• 2007

This paper presents a novel polar transmitter architecture with a 2-bit sigma-delta modulator. In the proposed architecture, the 2-bit sigma-delta modulator is introduced to suppress quantization noise of conventional sigma-delta modulator. The power amplifier configuration is also modified in a binary form to accommodate the 2-bit digitized envelope signal. The Ptolemy simulation results of the proposed structure show that the spectral property is greatly improved in full transmit band of EDGE system. The fine quantization scheme of the 2-bit modulator lowers the noise level by 10dB without increasing the over-sampling ratio, which may be obtained if the over-sampling ratio increases twofold. Dynamic range is also enhanced up to 5dB owing to the new form of the power amplifier in the transmitter.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.44 no.2
• /
• pp.81-86
• /
• 2007

In this paper, the Power Added Efficiency (PAE) and linearity of class-F PA has been improved by using the PBG structure and the application of EER structure, simultaneously. The adaptive bias control circuit has been employed to improve the PAE through the application of EER structure. The PBG structure has been adapted for improving the Linearity by suppressing the harmonics on the output of amplifier. The PAE and the 3rd Inter-Modulation Distortion (IMD) has improved 34.56%, 10.66 dB, compared with those of the conventional Doherty amplifier, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.19 no.8
• /
• pp.854-861
• /
• 2008

We have described a high power hybrid envelope elimination and restoration(H-EER) transmitter for IEEE 802.16e Mobile World Interoperability for Microwave Access(WiMAX) using an efficiency optimized power amplifier(PA). The PA has been designed to have maximum PAE at the important power generation $V_{ds}$, region using Nitronex 100-W PEP GaN HEMT. For the high power application, H-EER transmitter should be considered the regenerative oscillation problem due to the PA's bias fluctuation effect and bias modulator stability issue. Therefore, the bias modulator for H-EER transmitter has been designed to suppress the regenerative oscillation. For the interlock experiment, the bias modulator has been built with the efficiency of 72% and peak output voltage of 30 V for the envelope signal with a PAPR of 8.5 dB. The H-EER transmitter for WiMAX application has been achieved a high PAE characteristic, 38.8 % at an output power of 41.25 dBm. By using digital predistortion(DPD) technique, the Relative Constellation Error (RCE) has been satisfied the specification of -34.5 dB. This is the first work at 2.655 GHz high power H-EER transmitter for WiMAX application.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.18 no.8
• /
• pp.880-886
• /
• 2007

We have proposed a new "hybrid" envelope elimination and restoration(EER) transmitter architecture using an efficiency optimized power amplifier(PA) and modified bias modulator. The efficiency of the PA at the average drain voltage is very important for the overall transmitter efficiency because the PA operates mostly at the average power region of the modulation signal. Accordingly, the efficiency of the PA has been optimized at the region. Besides, the bias modulator has been accompanied with the emitter follower for the minimization of memory effect. A saturation amplifier, class $F^{-1}$ is built using a 5-W PEP LDMOSFET for forward-link single-carrier wideband code-division multiple-access(WCDMA) at 1-GHz. For the interlock experiment, the bias modulator has been built with the efficiency of 64.16% and peak output voltage of 31.8 V. The transmitter with the proposed PA and bias modulator has been achieved an efficiency of 44.19%, an improvement of 8.11%. Besides, the output power is enhanced to 32.33 dBm due to the class F operation and the PAE is 38.28% with ACLRs of -35.9 dBc at 5-MHz offset. These results show that the proposed architecture is a very good candidate for the linear and efficient high power transmitter.