• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.9 no.2
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• pp.60-67
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• 2010

In the ubiquitous age, applications of wireless personal area network (WPAN) technology using LEDs are in progress. However, visible light communications (VLC) using the LEDs have weakness which deteriorate performance of communication because of multi-path fading that occurs propagation delay by interior walls or other things in indoor environments. In this paper, orthogonal frequency division multiplexing (OFDM) scheme is adapted to decrease multi-path fading and multi-path dispersion and to provide high speed data transmission. Besides, to reduce information losses caused by optical noise (incandescent lamps, fluorescent lamps, sunbeam etc.) also proposed channel coding using turbo codes. The encoding and decoding of the proposed system is described, and simulation results are analyzed. We can know that performance of proposed system is increased about 4 [dB] through the simulation results. Also, when the system take doppler effect, the system performance worsened.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.3
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• pp.292-299
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• 2015

An envelope elimination and restoration transmitter that uses a tri-level envelope encoding scheme is presented for improving the efficiency and linearity of the system. The proposed structure amplifies the same magnitude signal regardless of the input peak-to-average power ratio and reduces the quantization noise by spreading out the noise to the out-of-band frequency, resulting in the enhancement of power efficiency. An improved linearity is also obtained by providing a new timing mismatch calibration technique between the envelope and phase signal. Implementation in a 130 nm CMOS process, transmitter measurements on a 20-MHz long-term evolution input signal show an error vector magnitude of 3.7 % and an adjacent channel leakage ratio of 37.5 dBc at 2.13 GHz carrier frequency.

• Journal of Korea Multimedia Society
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• v.14 no.7
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• pp.917-923
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• 2011

In this paper, a new prediction based embedded compression (EC) codec algorithm for the JPEG2000 encoder system is proposed to reduce excessive memory requirements. The EC technique can reduce the 50 % memory requirement for intermediate low-frequency coefficients during multiple discrete wavelet transform (DWT) stages compared with direct implementation of the DWT engine of this paper. The LOCO-I predictor and MAP are widely used in many lossless picture compression codec. The proposed EC algorithm use these predictor which are very simple but surprisingly effective. The predictive EC scheme adopts a forward adaptive quantization and fixed length coding to encoding the prediction error. Simulation results show that our LOCO-I and MAP based EC codecs present only PSNR degradation of 0.48 and 0.26 dB in average, respectively. The proposed algorithm improves the average PSNR by 1.39 dB compared to the previous work in [9].

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.12
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• pp.2315-2320
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• 2006

A real-time frame-layer rate control algorithm with a token bucket traffic shaper is proposed for low bit rate video coding. The proposed rate control method uses a non-iterative optimization method for low computational complexity, and performs bit allocation at the frame level to minimize the average distortion over an entire sequence as well as variations in distortion between frames. In order to reduce the quality fluctuation, we use a sliding window scheme which does not require the pre-analysis process. Therefore, the proposed algorithm does not produce time delay from encoding, and is suitable for real-time low-complexity video encoder. Experimental results indicate that the proposed control method provides better visual and PSNR performances than the existing rate control method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.3C
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• pp.59-63
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• 2005

We propose non-DC-free generalized PRML (GPRML) that are suppressed DC contents for matching to the response of perpendicular magnetic recording channel with a ring-head. In addition, DC-free encoding is considered to prevent low-frequency disturbances. The SNR performance is obtained by combining the various PRML channels with DC-free and non-DC-free codes during the normalized recording density increases from 2.5 to 3.5. The GPRML detections without using DC-free code get SNR gains more than 1dB compared to the conventional PRML systems at 10/sup -5/BER. We confirmed that the rate 127/136 DC-free coded GPRML systems show good performances compared with the 16/17 non-DC-free coded GPRML systems. In results, DC-free coded GPRML detections get gains about 1.4dB and 2.0dB at the density of 3.3 and 3.5, respectively.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.6 no.2
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• pp.71-75
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• 2013

Recently proliferating heterogeneous multimedia service environments should be able to deal with many different transmission speeds, image sizes, or qualities of video. However, not many existing video compression standards satisfy those necessities. To satisfy the functional requirements, the standardization of the H.264/AVC Scalable Extension (SE) technique has been recently completed. It is an extension of the H.264/AVC which can encode several image sizes and qualities at the same time as a single bitstream. To perform optimum mode decision, motion estimation is performed for all MB modes, and the RD costs are compared to identify an MB mode with the smallest RD cost. This increases computational complexity of H.264/AVC SE encoding. In this paper, we propose an early skip mode detection scheme to reduce candidate modes and suggest an algorithm of fast mode decision utilizing reference modes according to the mode history.

• Journal of Broadcast Engineering
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• v.11 no.2 s.31
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• pp.200-206
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• 2006

This paper presents a preprocessing method to modify the input audio signals of a speech coder to obtain the finally enhanced signals at the decoder. For the purpose, we introduce the noise suppression (NS) scheme and the adaptive gain control (AGC) where an audio input and its coding error are considered as a noisy signal and a noise, respectively. The coding error is suppressed from the input and then the suppressed input is level aligned to the original input by the following AGC operation. Consequently, this preprocessing method makes the spectral energy of the music input redistributed all over the spectral domain so that the preprocessed music can be coded more effectively by the following coder. As an artifact, this procedure needs an additional encoding pass to calculate the coding error. However, it provides a generalized formulation applicable to a lot of existing speech coders. By preference listening tests, it was indicated that the proposed approach produces significant enhancements in the perceived music qualities.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.43 no.3 s.309
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• pp.92-99
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• 2006

In this paper, a low-power deblocking filter structure for H.264 video coding algorithm is proposed. By sharing addition hardware for common filter coefficients, we have designed an efficient deblocking filter structure. Proposed deblocking filter utilizes MUX and DEMUX circuits for input data sharing and shows 44.2% reduction for add operation. In the HDL coding simulation and FPGA implementation, we achieved 19.5% and 19.4% gate count reduction, respectively, comparison with the conventional deblocking filter structure. Due to its efficient processing scheme, the proposed structure can be widely used in H.264 encoding and decoding SoC.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.774-780
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• 2017

This paper proposes an efficient binary arithmetic encoder hardware architecture for CABAC encoding, which is an entropy coding method of HEVC. CABAC is an entropy coding method that is used in HEVC standard. Entropy coding removes statistical redundancy and supports a high compression ratio of images. However, the binary arithmetic encoder causes a delay in real time processing and parallel processing is difficult because of the high dependency between data. The operation of the proposed CABAC BAE hardware structure is to separate the renormalization and process the conventional iterative algorithm in parallel. The new scheme was designed as a four-stage pipeline structure that can reduce critical path optimally. The proposed CABAC BAE hardware architecture was designed with Verilog HDL and implemented in 65nm technology. Its gate count is 8.07K and maximum operating speed of 769MHz. It processes the four bin per clock cycle. Maximum processing speed increased by 26% from existing hardware architectures.

• Journal of IKEEE
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• v.23 no.4
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• pp.1288-1294
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• 2019

The channel-achieving property made the polar code show to advantage as an error-correcting code. However, sufficient error-correction performance shows the asymptotic property that is achieved when the length of the code is long. Therefore, efficient architecture is needed to realize the implementation of very-large-scale integration for the case of long input data. Although the most basic fully parallel encoder is intuitive and easy to implement, it is not suitable for long polar codes because of the high hardware complexity. Complementing this, a partially parallel encoder was proposed which has an excellent result in terms of hardware area. Nevertheless, this method has not been completely generalized and has the disadvantage that different architectures appear depending on the hardware designer. In this paper, we propose a hardware design scheme that applies the proposed systematic approach which is optimized for bit-dimension permutations. By applying this solution, it is possible to design a generalized partially parallel encoder for long polar codes with the same intuitive architecture as a fully parallel encoder.